• Title/Summary/Keyword: 2 Step delay

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Two-step a priori SNR Estimation in the Log-mel Domain Considering Phase Information (위상 정보를 고려한 로그멜 영역에서의 2단계 선험 SNR 추정)

  • Lee, Yun-Kyung;Kwon, Oh-Wook
    • Phonetics and Speech Sciences
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    • v.3 no.1
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    • pp.87-94
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    • 2011
  • The decision directed (DD) approach is widely used to determine a priori SNR from noisy speech signals. In conventional speech enhancement systems with a DD approach, a priori SNR is estimated by using only the magnitude components and consequently follows a posteriori SNR with one frame delay. We propose a phase-dependent two-step a priori SNR estimator based on the minimum mean square error (MMSE) in the log-mel spectral domain so that we can consider both magnitude and phase information, and it can overcome the performance degradation caused by one frame delay. From the experimental results, the proposed estimator is shown to improve the output SNR of enhanced speech signals by 2.3 dB compared to the conventional DD approach-based system.

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Spondylodiscitis Misdiagnosed as Spinal Stenosis and Compression Fracture -A report of two cases- (요척주관 협착증과 압박 골절로 오인된 척추 추간판염 2예 -증례보고-)

  • Hong, Ji Hee;Kim, Sae-Young;Han, Sung Ho
    • The Korean Journal of Pain
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    • v.22 no.2
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    • pp.176-180
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    • 2009
  • Cases of pyogenic spondylodiscitis are relatively rare diseases that concern 2-7% of total cases of osteomyelitis. Owing to the low frequency and initial nonspecific nature of signs and symptoms, diagnosis is often delayed up to 2-6 months. If the proper treatment is not established due to a diagnostic delay, there is a possibility of a serious neurologic deficit and spinal instability. We report two cases of infectious spondylodiscitis which were misdiagnosed as compression fracture and spinal stenosis respectively. They could be correctly diagnosed after MRI and laboratory test and under the recovery state after an antifungal and antibiotic medication. Special careful attention during the diagnostic procedure is a really important step considering the diagnostic delay and its resultant unsatisfactory outcome.

A Data Fusion Algorithm of the Nonlinear System Based on Filtering Step By Step

  • Wen Cheng-Lin;Ge Quan-Bo
    • International Journal of Control, Automation, and Systems
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    • v.4 no.2
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    • pp.165-171
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    • 2006
  • This paper proposes a data fusion algorithm of nonlinear multi sensor dynamic systems of synchronous sampling based on filtering step by step. Firstly, the object state variable at the next time index can be predicted by the previous global information with the systems, then the predicted estimation can be updated in turn by use of the extended Kalman filter when all of the observations aiming at the target state variable arrive. Finally a fusion estimation of the object state variable is obtained based on the system global information. Synchronously, we formulate the new algorithm and compare its performances with those of the traditional nonlinear centralized and distributed data fusion algorithms by the indexes that include the computational complexity, data communicational burden, time delay and estimation accuracy, etc.. These compared results indicate that the performance from the new algorithm is superior to the performances from the two traditional nonlinear data fusion algorithms.

Algorithm for Arthmetic Optimization using Carry-Save Adders (캐리-세이브 가산기를 이용한 연산 최적화 알고리즘)

  • Eom, Jun-Hyeong;Kim, Tae-Hwan
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.12
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    • pp.1539-1547
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    • 1999
  • 캐리-세이브 가산기 (CSA)는 회로 설계 과정에서 빠른 연산 수행을 위해 가장 널리 이용되는 연산기 중의 하나이다. 그러나, 현재까지 산업체에서 CSA를 이용한 설계는 설계자의 경험에 따른 수작업에 의존하고 있고 그 결과 최적의 회로를 만들기 위해 매우 많은 시간과 노력이 소비되고 있다. 이에 따라 최근 CSA를 기초로 하는 회로 합성 자동화 기법에 대한 연구의 필요성이 대두되고 있는 상황에서, 본 논문은 연산 속도를 최적화하는 효율적인 CSA 할당 알고리즘을 제안한다. 우리는 CSA 할당 문제를 2단계로 접근한다: (1) 연산식의 멀티 비트 입력들만을 고려하여 최소 수행 속도 (optimal-delay)의 CSA 트리를 할당한다; (2) (1)에서 구한 CSA 트리의 수행 속도 증가가 최소화 (minimal increase of delay) 되는 방향으로 CSA들의 캐리 입력 포트들에 나머지 싱글 비트 입력들을 배정한다. 실제 실험에서 우리의 제안된 알고리즘을 적용하여 연산식들의 회로 속도를 회로 면적의 증가 없이 상당한 수준까지 줄일 수 있었다.Abstract Carry-save-adder (CSA) is one of the most widely used implementations for fast arithmetics in industry. However, optimizing arithmetic circuits using CSAs is mostly carried out by the designer manually based on his/her design experience, which is a very time-consuming and error-prone task. To overcome this limitation, in this paper we propose an effective synthesis algorithm for solving the problem of finding an allocation of CSAs with a minimal timing for an arithmetic expression. Specifically, we propose a two step approach: (1) allocating a delay-optimal CSA tree for the multi-bit inputs of the arithmetic expression and (2) determining the assignment of the single-bit inputs to carry inputs of the CSAs which leads to a minimal increase of delay of the CSA tree obtained in step (1). For a number of arithmetic expressions, we found that our approach is very effective, reducing the timing of the circuits significantly without increasing the circuit area.

A Study on Optimal PID Controller Design Ensure the Absolute Stability (절대안정도를 보장하는 최적 PID 제어기 설계에 관한 연구)

  • Cho, Joon-Ho
    • Journal of Convergence for Information Technology
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    • v.11 no.2
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    • pp.124-129
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    • 2021
  • In this paper, an optimal controller design that guarantees absolute stability is proposed. The order of application of the thesis determines whether the delay time is included, and if the delay time is included, the delay time is approximated through the Pade approximation method. Then, the open loop transfer function for the process model and the controller transfer function is obtained, and the absolute stability interval is calculated by the Routh-Hurwitz discrimination method. In the last step, the optimal Proportional and Integral and Derivative(PID) control parameter value is calculated using a genetic algorithm using the interval obtained in the previous step. As a result, it was confirmed that the proposed method guarantees stability and is superior to the existing method in performance index by designing an optimal controller. If we study the compensation method for the delay time in the future, it is judged that better performance indicators will be obtained.

Performance Improvement on Adaptive OFDM System with a Multi-Step Channel Predictor over Mobile Fading Channels (이동 페이딩 채널하의 멀티 스텝 채널 예측기를 이용한 적응 OFDM 시스템의 성능개선)

  • Ahn, Hyun-Jun;Kim, Hyun-Dong;Choe, Sang-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.12A
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    • pp.1182-1188
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    • 2006
  • Adaptive OFDM(Orthogonal Frequency Division Multiplexing) improves data capacity and system performance over multipath fading by adaptively changing modulation schemes according to channel state information(CSI). To achieve a good performance in adaptive OFDM systems, CSI should be transmitted from receiver to transmitter in real time through feedback channel. However, practically, the CSI feedback delay d which is the sum of the data processing delay and the propagation delay is not negligible and damages to the reliability of CSI such that the performance of adaptive OFDM is degraded. This paper presents an adaptive OFDM system with a multistep predictor on the frequency axis to effectively compensate the multiple feedback delays $d(\geq2)$. Via computer simulation we compare the proposed scheme and existing adaptive OFDM schemes with respect to data capacity and system performance.

Design of Low Voltage 1.8V, Wide Range 50∼500MHz Delay Locked Loop for DDR SDRAM (DDR SDRAM을 위한 저전압 1.8V 광대역 50∼500MHz Delay Locked Loop의 설계)

  • Koo, In-Jae;Chung, Kang-Min
    • The KIPS Transactions:PartA
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    • v.10A no.3
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    • pp.247-254
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    • 2003
  • This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.

MICROLEAKAGE OF CL V COMPOSITE RESTORATIONS USING VARIOUS LIGHT CURING METHODS (광중합 복합레진 수복시 여러 광조사 방법에 따른 미세변연누출에 관한 연구)

  • Yang, Chol-Young;Yoo, Hyeon-Mee;Kwon, Hyuk-Choon
    • Restorative Dentistry and Endodontics
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    • v.25 no.2
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    • pp.299-308
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    • 2000
  • The purpose of this in vitro study was to evaluate the microleakage of 5 curing methods in class V composite restorations which are composed of two-step light curing, pulse-delay cure, low curing-light intensity, moderate curing-light intensity and high curing-light intensity. In this study, class V cavities were prepared on buccal and lingual surfaces of 50 extracted human upper or lower molars on cementum margin. Single Bond adhesive and Z-100 shade A2 were applied for each group following the manufacture's instruction. The experimental teeth were randomly divided into 5 groups of 10 samples (20 surfaces) each. Group 1: two-step light curing; Group 2: pulse-delay cure; Group 3: low curing-light intensity; Group 4: moderate curing-light intensity; Group 5: high curing-light intensity. After 500 thermocycling between $5^{\circ}C$ and $55^{\circ}C$, the 60 teeth were placed in 2% methylene blue dye for 24 hours, then rinsed with tab water. The specimens were embedded in clear resin, then sectioned buccolingually through the center of restoration with a low speed diamond saw. The dye penetration on each of the specimen was then observed with a stereomicroscope at ${\times}20$. The composite resin/tooth interfaces were examined under Scanning Electron Microscopy. The results were statistically analyzed using the Kruskal-Wallis One Way ANOVA and Dunn's Method. The results of this study were as follows. 1. In all groups, the leakage values seen at the enamel margin were significantly lower than those seen at the dentin margin(P<0.05). 2. No group in this study showed significant differences in leakage values at both the enamel and the dentin margins(P<0.05). 3. In all groups, the gaps seen at the enamel margin were significantly lower than those seen at the dentin margin(P<0.05). 4. The gaps in this study showed significant differences and two-step light-curing and low curing-light intensity produced significant less gap than high curing-light intensity(P<0.05).

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HIGHER ORDER GALERKIN FINITE ELEMENT METHOD FOR THE GENERALIZED DIFFUSION PDE WITH DELAY

  • LUBO, GEMEDA TOLESSA;DURESSA, GEMECHIS FILE
    • Journal of applied mathematics & informatics
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    • v.40 no.3_4
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    • pp.603-618
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    • 2022
  • In this paper, a numerical solution of the generalized diffusion equation with a delay has been obtained by a numerical technique based on the Galerkin finite element method by applying the cubic B-spline basis functions. The time discretization process is carried out using the forward Euler method. The numerical scheme is required to preserve the delay-independent asymptotic stability with an additional restriction on time and spatial step sizes. Both the theoretical and computational rates of convergence of the numerical method have been examined and found to be in agreement. As it can be observed from the numerical results given in tables and graphs, the proposed method approximates the exact solution very well. The accuracy of the numerical scheme is confirmed by computing L2 and L error norms.

An Analytic Study on the Relations between the Ziegler-Nichols Tuning Methods for Controllers (지글러-니콜스 제어파라미터 조정법 (1), (2)의 연관성에 대한 해석적 연구)

  • 강인철;최순만;최재성
    • Journal of Advanced Marine Engineering and Technology
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    • v.26 no.2
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    • pp.219-225
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    • 2002
  • Parameter tuning methods by Ziegler-Nichols for PID controllers are generally classified into Z-N(1) and Z-N(2). The purpose of this paper is to describe what relations exist between the methods of Z-N(1) and Z-N(2), or how Z-N(1) can be originated from Z-N(2) by analyzing one loop control system composing of P or PI controller and time delay process. In this paper, for the first step to seek mutual relations, the simple formulas of Z-N(2) are transformed into those composing of the same parameters as Z-N(1) which is derived from the analysis of frequency characteristics. Then, the approximation of the actual ultimate frequency is proposed as important premise in the translation between Z-N(1) and (2). Such equalization and approximation brings a simple approximated formula which can explain how Z-N(1) is originated from the Z-N(2) in the form of formula.