• Title/Summary/Keyword: 18GHz band

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Dual-Band Microstrip Patch Antenna with Switchable Orthogonal Linear Polarizations

  • Kim, Jeongin;Sung, Youngje
    • Journal of electromagnetic engineering and science
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    • v.18 no.4
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    • pp.215-220
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    • 2018
  • This study presents a dual-band polarization-reconfigurable antenna that comprises a large square patch with a pair of corner-cut edges and two small square patches with a shorting via. Two PIN diodes are located between the large square patch and two small square patches. Depending on the bias state applied to the two PIN diodes, each small patch may be disconnected or connected to the large square patch. As a result, the proposed antenna can provide polarization reconfigurability between two orthogonal linear polarizations. Further, the proposed antenna operates at 2.51 GHz and 2.71 GHz. From the measured results, the proposed antenna shows a 10 dB bandwidth of 2.39% (2.49-2.55 GHz) and 2.58% (2.68-2.75 GHz). In this work, the frequency ratio can be easily controlled by changing the size of the small patch.

Design of Wide-Band, High Gain Microstrip Antenna Using Parallel Dual Slot and Taper Type Feedline (평행한 이중 슬롯과 Taper형 급전선로를 이용한 광대역, 고이득 마이크로스트립 안테나의 설계)

  • Lee, Sang-Woo;Lee, Jae-Sung;Kim, Chol-Soo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.3 s.118
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    • pp.257-264
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    • 2007
  • In this paper, we have designed and fabricated a wide-band and high gain antenna which can integrate a standard of IEEE 802.1la$(5.15\sim5.25\;GHz,\;5.25\sim5.35\;GHz,\;5.725\sim5.825\;GHz)$. We inserted a parallel dual slot into a rectangular patch to have wide-band, and we offset an element of capacitance from the slot by using coaxial probe feeding method. We also designed a converter of $\lambda_g/4$ impedance with taper type line so that wide-band impedance can be matched easily. We finally designed structure with $2\times2$ array in order to improve the antenna gain, and the final fabricated antenna could have a good return loss(Return loss$\leq$-10 dB) and a high gain(over 13 dBi) at the range of $5.01\sim5.95\;GHz(B/W\doteqdot940\;MHz)$.

Development of Single Feed Antenna for Integrated Public Network and 5G Network Frequency Dual-band Cover (통합 공공망과 5G 주파수 이중대역 커버용 단일 급전 안테나 개발)

  • Hong, Ji-Hun;Choi, Yoon-Seon;Woo, Jong-Myung
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.18 no.6
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    • pp.233-240
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    • 2019
  • In this paper, due to the development of 5G communication technology, an antenna capable of covering both LTE and 5G bands is currently needed. In addition, we designed and manufactured a single feed antenna for the integrated public network (LTE) and 5G frequency dual band cover to satisfy the frequency bandwidth of more than 10% in each band. The antenna designed by adopting the dipole of the basic dipole antenna in a planar structure is a form in which the radiating element is vertically extended at all of the 700 MHz antennas and folded into a 'ㄷ' shape. In addition, the radiating element of the 700MHz band serves as a reflector of the 3.5GHz band radiating element. As a result, the 700 MHz band -10 dB bandwidth 104 MHz(14.8%) and 3.5 GHz band -10 dB bandwidth 660 MHz(18.8%) were obtained and the radiation pattern characteristic resulted in gains of 8.46 dBi, beam width E-plane 55°, H-plane 81° and 3.5 GHz bands 6.14 dBi, beamwidth E-plane 79°, H-Plane 49°.

Design and Fabrication of Wideband High Pass Filter Using Left-Handed Transmission Line (LH 전송선을 이용한 광대역 고역통과 필터 설계 및 제작)

  • Yang, Doo-Yeong;Seo, Soo-Duk;Cho, Hak-Rae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.2
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    • pp.260-267
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    • 2014
  • In this paper, the unit cell of LH structure using microstrip transmission line and chip capacitor is devised, and the reactive components of equivalent circuit are extracted from the proposed unit cell. And then, we have analyzed for the unit cell parameters and applied the characteristics to the wideband high pass filter design. This filter cascading several unit cells with high pass property has been implemented on microstrip transmission line, and the performance has been the band rejection characteristics of 62.9 dB in the stop band to 0~2.18 GHz and less than the insertion loss of 1.17 dB in the pass band from 3.0G Hz to 12.75 GHz.

Development of MMIC SSPA for 20GHz Band (20GHz 대 MMIC SSPA 개발)

  • 임종식;김종욱
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.327-330
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    • 1998
  • A 2watts MMIC(Monolithic Microwave Integrated Circuits) SSPA(Solid State Power Amplifiers) for 20GHz band communication systems has been designed, manufactured and measured. The 0.15um pHEMT technologywith the gate size of 400um for single device was used for the fabrication of MMIC Power Amplifier chips. The precision MIC patterns for the peripherals like power combiner/divider and microstrip lines were realized using hard substrate for gold wire/ribbon bonding. The measured data shows that this MMIC SSPA has the linear gain of 18dB, output power of 33.42dBm(2.2Watts)at 20~21GHz.

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MMIC Low Noise Amplifier Design for Millimeter-wave Application (밀리미터파 응용을 위한 MMIC 저잡음 증폭기 설계)

  • 장병준;염인복;이성팔
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.7
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    • pp.1191-1198
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    • 2001
  • MMIC low noise amplifiers for millimeter-wave application using 0.15 $\mu$m pHEMT have been presented in this paper. The design emphasis is on active device model and EM simulation. The deficiency of conventional device models is identified. A distributed device model has been adapted to circumvent the scaling problems and, thus, to predict small signal and noise parameters accurately. Two single-ended low noise amplifier are designed using distributed active device model for Q-band(40 ∼ 44 GHz) and V-band(58 ∼65 GHz) application. The Q-band amplifier achieved a average noise figure of 2.2 dB with 18.3 dB average gain. The V-band amplifier achieved a average noise figure of 2.9 dB with 14.7 dB average gain. The design technique and model employed provides good agreement between measured and predicted results. Compared with the published data, this work also represents state-of-the-art performance in terms of gain and noise figure.

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10.525 GHz Band Broadband Inset-fed Microstrip Patch Antenna (10.525 GHz 대역 광대역 인셋-급전 마이크로스트립 패치 안테나)

  • Junho Yeo;Jong-Ig Lee
    • Journal of Advanced Navigation Technology
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    • v.28 no.1
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    • pp.136-141
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    • 2024
  • In this paper, a broadband inset-fed microstrip patch antenna operating at 10.525 GHz band was proposed. The proposed broadband inset-fed microstrip patch antenna consists of three narrow rectangular patches. At the center of the center patch, two symmetrical side patches were connected by a strip conductor and were arranged with their centers shifted in a perpendicular direction with respect to the center patch. For performance comparison, a conventional inset-fed square microstrip patch antenna was designed. Experiment results show that the frequency band of the measured input reflection coefficient with a voltage standing wave ratio less than 2 for the broadband inset-fed microstrip patch antenna was 10.036-11.051 GHz (9.63%), whereas that for the conventional inset-fed rectangular microstrip patch antenna was 10.306-10.772 GHz (4.42%). Therefore, the input reflection coefficient frequency bandwidth of the fabricated broadband inset-fed microstrip patch antenna was increased by 2.18 times, compared to the conventional inset-fed square microstrip patch antenna.

A 2.4 /5.2-GHz Dual Band CMOS VCO using Balanced Frequency Doubler with Gate Bias Matching Network

  • Choi, Sung-Sun;Yu, Han-Yeol;Kim, Yong-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.4
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    • pp.192-197
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    • 2009
  • This paper presents the design and measurement of a 2.4/5.2-GHz dual band VCO with a balanced frequency doubler in $0.18\;{\mu}m$ CMOS process. The topology of a 2.4 GHz VCO is a cross-coupled VCO with a LC tank and the frequency of the VCO is doubled by a frequency balanced doubler for a 5.2 GHz VCO. The gate bias matching network for class B operation in the balanced doubler is adopted to obtain as much power at 2nd harmonic output as possible. The average output powers of the 2.4 GHz and 5.2 GHz VCOs are -12 dBm and -13 dBm, respectively, the doubled VCO has fundamental harmonic suppression of -25 dB. The measured phase noises at 5 MHz frequency offset are -123 dBc /Hz from 2.6 GHz and -118 dBc /Hz from 5.1 GHz. The total size of the dual band VCO is $1.0\;mm{\times}0.9\;mm$ including pads.

Ka-band Power Amplifiers for Short-range Wireless Communication in $0.18-{\mu}m$ CMOS Process ($0.18-{\mu}m$ CMOS공정을 이용한 Ka 대역 근거리 무선통신용 전력증폭기 설계)

  • He, Sang-Moo;Lee, Jong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.131-136
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    • 2008
  • Two Ka-band 3-stage power amplifiers were designed and fabricated using $0.18-{\mu}m$ CMOS technology. For low loss matching networks for the amplifiers, two substrate-shielded transmission line structures, having good modeling accuracy up to 40 GHz were used. The measured insertion loss of substrate-shielded microstrip-line (MSL) was 0.5 dB/mm at 27 GHz. A 3-stage CMOS amplifier using substrate-shielded MSL achieved a 14.7-dB small-signal gain and a 14.5-dBm output power at 27 GHz in a compact chip area of 0.83$mm^2$. The measured insertion loss of substrate-shielded coplanar waveguide (CPW) was 1.0 dB/mm at 27 GHz. A 3-stage amplifier using substrate-shielded CPW achieved a 12-dB small-signal gai and a 12.5-dBm output power at 26.5 GHz. This results shows a potential of CMOS technology for low cost short-range wireless communication components and system.

Performance of X-Band Amplifier with Coupling Method (X-band 증폭기의 결합방법에 따른 특성 비교)

  • 조광래;윤현보;진연강
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.13 no.3
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    • pp.216-220
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    • 1988
  • The design and performance of 12GHz low-noise amplifierwith GaAs MESFET and microstrip line are described. It contains DC blocks with symmetric line and chip capacitor, respectively. The low-noise amplifier with chip capacitor and DC block exhibits a 8-11 dB gain over 11.8-12.1 GHz and 16-18dB gain over 12.16-12.19GHz, respectively.

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