• Title/Summary/Keyword: 1.8 GHz

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Design of a High-Resolution DCO Using a DAC (DAC를 이용한 고해상도 DCO 설계)

  • Seo, Hee-Teak;Park, Joon-Ho;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.7
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    • pp.1543-1551
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    • 2011
  • Dithering scheme has been widely used to improve the resolution of DCO(Digitally Controlled Oscillator) in conventional ADPLLs(All Digital Phase Locked Loop). In this paper a new resolution improvement scheme is proposed where a simple DAC(Digital-to-Analog Converter) is employed to overcome the problems of dithering scheme. The frequencies are controled by varactors in coarse, fine, and DAC bank. The DAC bank consists of an inversion mode NMOS varactor. The other varactor banks consist of PMOS varactors. Each varactor bank is controlled by 8bit digital signal. The proposed DCO has been designed in a $0.13{\mu}m$ CMOS process. Measurement results shows that the designed DCO oscillates in 2.8GHz~3.5GHz and has a frequency tuning range of 660MHz and a resolution of 73Hz at 2.8GHz band. The designed DCO exhibits a phase noise of -119dBc/Hz at lMHz frequency offset. The DCO core consumes 4.2mA from l.2V supply. The chip area is $1.3mm{\times}1.3mm$ including pads.

Design of a V Band Power Amplifier Using 65 nm CMOS Technology (65 nm CMOS 공정을 이용한 V 주파수대 전력증폭기 설계)

  • Lee, Sungah;Cui, Chenglin;Kim, Seong-Kyun;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.4
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    • pp.403-409
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    • 2013
  • In this work, a CMOS two stage differential power amplifier which includes Marchand balun, transformer and injection-locked buffer is presented. The power amplifier is targeted for 70 GHz frequency band and fabricated using 65 nm technology. The measurement results show 8.5 dB maximum voltage gain at 71.3 GHz and 7.3 GHz 3 dB bandwidth. The measured maximum output power is 8.2 dBm, input $P_{1dB}$ is -2.8 dBm, output $P_{1dB}$ is 4.6 dBm and maximum power added efficiency is 4.9 %. The power amplifier consumes 102 mW DC power from 1.2 V supply voltage.

위성통신용 수신기의 설계

  • 정우영;백정기;최부귀
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1996.10a
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    • pp.184-195
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    • 1996
  • 본 논문에서는 게이트의 길이가 0.25um인 GaAs HEMT를 이용하여 11.7GHz -12.2GHz 대역 위성통신용 수신기를 설계하였다. 설계된 수신기의 전체이득은 38dB 이상, 잡음지수 1.8dB 이하, 입출력단의 반사손실은 -10dB 이하를 보였다. 수신기는 저잡음증폭기(LNA), 중간주파수증폭기(IFA) , 믹서, 국부발진기(LO) 로 구성되어 있으며 LO 주파수와 IF 주파수는 각각 10.75GHz 와 0.95GHz-1.45GHz이고 칩의 크기는 1.7mm $\times$2.5mm이다.

Design of Rectangular Planar Monopole Antenna with a Double Sleeve (이중 슬리브를 갖는 직사각형 평면 모노폴 안테나 설계)

  • Kang, Sang-Won;Chang, Tae-Soon
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.1
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    • pp.215-220
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    • 2016
  • In this paper, a wideband antenna accomplished by adding a double sleeve of a rectangular planar monopole structure is proposed. In order to impedance matching of proposed antenna, the antenna performance was improved by adding two gap sleeves and outer sleeve for double sleeve structure. HFSS simulator of ANSYS corp. was used in order to confirm the antenna parameter characteristic. According to the simulation results, the VSWR was less than 2 for the range of 2.5GHz~10.5GHz. The frequency bandwidth is 8GHz. The frequency range of the actual fabricated antenna was 2.92GHz~10.32GHz, the frequency bandwidth is 7.4GHz. The measured radiation pattern frequency is 3GHz, 6GHz and 9GHz. The results are similar with dipole antenna pattern in all frequency. The antenna size is $40{\times}40mm^2$. The utilization possibility of the ultra-wideband planar monopole antenna could be confirmed according to compare and analyze the simulation and measurement data.

A Compact CPW-fed Antenna with Step Structure for 5 GHz Band WLAN Applications (계단구조를 갖는 5 GHz 대역 무선랜용 소형 CPW 안테나)

  • Choi, In-Tae;Shin, Ho-Sub
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.1
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    • pp.8-14
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    • 2016
  • In this paper, a compact CPW-fed antenna for 5 GHz (5.15-5.35 GHz, 5.725-5.825 GHz) band WLAN applications is presented. The designed antenna's shape is step structure. The antenna is fabricated and measured into FR-4 substrate of dielectric comstant 4.2 and thickness 1.0 mm with optimized parameters obtained by simulation. We confirm that it is operated as antenna for WLAN applications by obtaining the measured return loss level of < -10 dB in 5.133-5.982 GHz. The dimensions of the antenna ($20.0{\times}16.0{\times}1.0mm^3$) shows an compactness of about 67.17% with respect to a conventional folded slot antenna.

A 1.8GHz Low Voltage CMOS RF Down-Conversion Mixer (1.8GHz 대역의 저전압용 CMOS RF하향변환 믹서 설계)

  • 김희진;이순섭;김수원
    • Proceedings of the IEEK Conference
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    • 2000.06e
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    • pp.61-64
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    • 2000
  • This paper describes a RF Down-Conversion Mixer for mobile communication systems. This circuit achieves low voltage operation and low power consumption by reducing stacked devices of conventional gilbert cell mixer. In order to reduce stacked devices, we use source-follower structure. The proposed RF Down-Conversion mixer operates up to 1.85GHz at 1.5V power supply with 0.25um CMOS technology and consumes 2.2mA.

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Quadruple Band-Notched Trapezoid UWB Antenna with Reduced Gains in Notch Bands

  • Jin, Yunnan;Tak, Jinpil;Choi, Jaehoon
    • Journal of electromagnetic engineering and science
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    • v.16 no.1
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    • pp.35-43
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    • 2016
  • A compact ultra-wide band antenna with a quadruple band-notched characteristic is proposed. The proposed antenna consists of a slotted trapezoid patch radiator, an inverted U-shaped band stop filter, a pair of C-shaped band stop filters, and a rectangular ground plane. To realize the quadruple notch-band characteristic, a U-shaped slot, a complementary split ring resonator, an inverted U-shaped band stop filter, and two C-shaped band stop filters are utilized in this antenna. The antenna satisfies the -10 dB reflection coefficient bandwidth requirement in the frequency band of 2.88-12.67 GHz, with a band-rejection characteristic in the WiMAX (3.43-3.85 GHz), WLAN (5.26-6.01 GHz), X-band satellite communication (7.05-7.68 GHz), and ITU 8 GHz (8.08-8.87 GHz) signal bands. In addition, the proposed antenna has a compact volume of $30mm{\times}33.5mm{\times}0.8mm$ while maintaining omnidirectional patterns in the H-plane. The experimental and simulated results of the proposed antenna are shown to be in good agreement.

High Performance MMIC Star Mixer for Millimeter-wave Applications (밀리미터파 응용을 위한 우수한 성능의 MMIC Star 혼합기)

  • Ryu, Keun-Kwan;Yom, In-Bok;Kim, Sung-Chan
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.10A
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    • pp.847-851
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    • 2011
  • In this paper, we reported on a high performance MMIC star mixer for millimeter-wave applications. The star mixer was fabricated using drain-source-connected pseudomorphic high electron mobility transistor (PHEMT) diodes considering the PHEMT MMIC full process on 2 mil thick GaAs substrate. The average conversion loss of 13 dB was measured in the RF frequency range of 81 GHz to 86 GHz at LO frequency of 75 GHz with LO power of 10 dBm. The RF-LO isolation characteristics are greater than 30 dB and the input 1-dB compression are approximately 4 dBm. The total chip size is 0.8 mm ${\times}$ 0.8 mm.

Dual T type antenna study for LTE communication (LTE용 이중 T 안테나 연구)

  • Park, Yong-Wook
    • The Journal of the Korea institute of electronic communication sciences
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    • v.10 no.1
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    • pp.7-12
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    • 2015
  • In this paper, we studied the design and fabrication of dual T type antenna to be used in LTE communication systems operating at around 1.8 GHz band. In order to improve of frequency properties of antenna, single feed microstrip patch antenna and CPWG antenna was simulated by HFSS(High Frequency Structure Simulator). The fabricated dual T type antennat showed that the measured center frequency, the minimum return loss and -10dB bandwidth were 1.79 GHz, -23.26 dB and 23 MHz, respectively.

Development of a 2.8 GHz Local Oscillator for the Communication Satellite (인공위성용 2.8GHz 국부발전기에 관한 연구)

  • Seong Joon Kweon;Seong Kyu Lim;Sang Woong Lee;Keuk Whan Ra
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.5
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    • pp.58-67
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    • 1994
  • In this paper, It was designed the 2.8GHz local oscillator which convert 14.5 14.8GHz uplink frequency to 11.7 12.0GHz downlink frequency by the receiving mixer on the communication satellite transponder according to the rating of domestic satellite. Mukunghwa 1. To prevent the variation of the communication channel bandwidth, it needs a high stability and low phase noise characteristics. So we designed to get the target frequencey by multipling the output signal from the crystal oscillator. We got the simplicity of the circuit by manufacturing the X4 multiplier with transistor which is ordinarily used as a device of a below X3 multiplier for the efficiency.

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