• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.4
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• pp.327-334
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• 2000

In this paper, the circuit model using circuit averaging method for full bridge for full bridge converter is suggested. This model can represent the physical characteristics of converter circuits appropriately. At most of high capacity DC-DC converter application parts, full bridge converter is adapted for main circuit of power supply. Design and analysis of full bridge converter is no trouble with circuit model. The validity of circuit model is verified through computer simulation and practical welding experiment of welding machine with full bridge converted model.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.140-141
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• 2012

본 논문은 새로운 역률보상회로를 적용한 플러그인 하이브리드 전기 자동차 탑재형 완속 충전기(On-Board Charger, OBC)를 제안한다. 제안하는 완속 충전기용 역률보상회로 (Power Factor Correction, PFC)는 기존의 부스트 컨버터를 기본으로 하는 역률보상회로와 동일한 개수의 회로 부품과 입 출력전압 관계를 가진다. 회로 구조상 전파 정류된 DC 전압을 저장하는 입력 커패시터와 입력 인덕터의 에너지가 저장되는 출력 커패시터가 직렬 결합되어 DC-link 전압을 형성하므로 출력 커패시터의 동작전압(Working voltage)을 낮출 수 있어 단가절감이 가능하다. 제안된 역률보상 회로를 적용한 플러그인 하이브리드 전기 자동차 탑재형 완속 충전기에 대한 동작 특성을 해석하고 시뮬레이션을 통해 타당성을 검증한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.2
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• pp.47-54
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• 2004

Up to the present, there have been many works to analyze interconnects on timing aspects, while less works have been done on power aspects. As resistance of interconnects and rise time of signals increase, power consumption associated with interconnects is ever-increasing. In case of clock trees, particularly power consumption associated with interconnects is over 30％ of total power consumption. Hence, an efficient method to compute power consumption of interconnects is necessary and in this paper we propose a simple yet accurate method to estimate dynamic power consumption of interconnects. We propose a new reduced-order model to estimate power consumption of large interconnects. Through the proposed model which is directly derived from total capacitance and resistance of interconnects, we show that the dynamic power consumption of whole interconnects can be approximated, and propose an analytical method to compute the power consumption. The results applying the proposed method to various RC networks show that average relative error is 1.86％ and maximum relative error is 9.82％ in comparison with HSPICE results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.14 no.1
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• pp.109-117
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• 2000

A full bridge type double resonant high frequency resonant inverter to give VVVF function in the inverter used as power source of induction heating at high frequency is presented in this paper. This proposed inverter can reduce distribution of the switching current because of using the current of serial resonant circuit to the input current of the parallel one and this paper also realize the output control of independence irrespective of the switching frequency using Phase-shift. The analysis of the proposed circuit is generally described by using the normalized parameters. Also, the principle of basic operating and the its characteristics are estimated by the parameters, such as switching frequency, the variation of phase angle ($\phi$) of Phase-shift.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.4
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• pp.328-339
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• 2006

In this paper the characteristic analysis of a single-phase switched reluctance motor (SRM) drive system with power factor correction (PFC) circuit is presented. The SRM is a low cost, simple and has a good high speed performance. The SRM drive with diode rectifier and filter capacitor has a low power factor because of short switch on time of capacitor. A novel switching topologic is presented to improve power factor and reduce torque ripple based on analysis of PFC circuit. Accordingly the SRM drive system with PFC circuit is also presented. Through the numerical analysis of the system, the toque ripple, power factor and efficiency with the change of rotary speed, load torque and capacity of the capacitor are achieved and compared with actual measured value.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.4
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• pp.137-142
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• 2023

When designing a SMPS(Switched Mode Power Supply) circuit, a part that is easily overlooked without special consideration is a snubber circuit. However, the performance degradation of the SMPS due to the snubber circuit and the effect on the entire SET cannot be ignored. In addition, a snubber circuit is added to both ends of the switch to protect the device from peak voltage and current during switching and to reduce loss during on/off switching. Therefore, in this paper, for a sufficient understanding of snubber circuits, theoretical analysis and experimental formulas that can be applied by designers during actual circuit design are arranged to promote optimization of snubber circuits.

• 전기의세계
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• v.48 no.6
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• pp.48-53
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• 1999

• The Magazine of the IEIE
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• v.11 no.5
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• pp.11-17
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• 1984

• 전기의세계
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• v.28 no.4
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• pp.25-31
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• 1979

• Proceedings of the KIPE Conference
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• 2009.11a
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• pp.69-71
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• 2009

본 논문은 부하전압의 크기에 따라 동작모드가 다르게 구성되는 공진형 DC/DC 컨버터의 동작 특성을 해석한다. 공진형 DC/DC 컨버터는 직류 입력전원에 연결되는 LC 공진회로, 공진회로의 캐패시터 전압이 최대일 때 부하측으로 에너지를 전달하는 공진형 컨버터로 구성되어있다. 공진형 컨버터는 공진 회로의 캐패시터 전압과 부하전압의 상대적인 크기에 따라서 2개의 동작 모드 특성을 가진다. 공진 캐패시터 전압의 최대값이 부하전압보다 작을 경우, 스위칭 회로는 부스트 인덕터를 이용하여 입력측 에너지를 부하측으로 전달한다. 반대로 큰 경우에는 스위칭 동작없이 공진 캐패시터가 부하측으로 직접 연결되어 입력측 에너지를 부하로 전달한 후, 공진 캐패시터의 잔여 에너지를 부스트 인덕터를 이용하여 부하측으로 전달한다. 공진형 DC/DC 컨버터 회로의 동작원리를 설명하고, PSPICE Simulation 및 실험을 통하여 검증하였다.