• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2022.10a
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• pp.139-141
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• 2022

As interest in digital video media and intelligent systems increases rapidly, technologies using video information are being combined and used in various fields such as security and artificial intelligence. Impulse noise generated during digital image processing degrades the image quality of the image and reduces the reliability of information, so it is necessary to remove it through a filter. There are SMF, AWMF, and MDBUTMF as well-known antecedent methods, but they all have limitations in achieving seamless filtering in environments with large loss of information on valid pixels due to problems with the algorithm itself. Therefore, this paper designs a median filter algorithm that applies weights reflecting the reliability of the information by searching for the nearest effective pixels present within the mask. For performance evaluation, this algorithm and the preceding algorithm were compared and analyzed using PSNR and enlarged images.

• Convergence Security Journal
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• v.14 no.7
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• pp.23-28
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• 2014

This study proposes the design and implementation of the system for a facial expression recognition system. LDP(Local Directional Pattern) feature computes the edge response in a different direction from a pixel with the relationship of neighbor pixels. It is necessary to be estimated that LDP code can represent facial features correctly under various conditions. In this respect, we build the system of facial expression recognition to test LDP performance quickly and the proposed evaluation system consists of six components. we experiment the recognition rate with local micro patterns (LDP, Gabor, LBP) in the proposed evaluation system.

• Proceedings of the KIEE Conference
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• 2005.07d
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• pp.3078-3080
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• 2005

본 논문에서는 AF 기능을 구현함에 있어서 2 백만 화소 카메라 모듈인 Sharp LZ0P3731의 기능, AF 모터 (VCM, Voice Coil Motor)에 작용하는 힘과 구동원리, 이를 구동하기 위한 H/W의 설계 특성, 및 DM270을 이용한 AF 제어 시 Focus Value의 특성 분석을 바탕으로 Focus Value 특성을 고려한 최적 AF 알고리즘을 개발하였다. 본 논문에서 제안한 최적 AF 알고리즘은 '최대의 Focus Value가 각 State의 Step Value 마다 각각 다른 위치에서 검출'되는 AF 모터 및 구동 H/W특성을 고려하여, 최적 AF 기능은 최대의 AF Value에 근접하는 Lens Position 제어가 가능하도록 하였다. 이를 검증하기 위한 윈도우용 S/W로 성능을 확인한 결과, 일반적인 AF 기능은 58 프레임으로 3.87초의 시간이 소요되는 반면, 제안한 AF 기능은 25 프레임으로 1.67초로 2배 이상의 빠른 AF 성능을 가졌다.

• Proceedings of the Optical Society of Korea Conference
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• 2000.08a
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• pp.190-191
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• 2000

종래의 자기광학 디바이스는 자성체막을 빛이 투과할 때 얻어지는 페러데이 회전각을 이용했기 때문에, 페러데이 회전각을 증가시켜서, 광학적 성능을 증가시키려면 자성체막의 두께를 증가시켜야만 했다. 그러나, 자성체막의 두께를 증가시키면, 화소를 자기적으로 분리하기 위하여 자성체 막을 물리적으로 제거 해야하여 깊이가 깊어지고 그 후에 도선막을 구조화하기 위하여 파낸 화소간 갭을 다시 평탄화해야 하는 등의 제조 공정이 기술적으로 매우 어려워진다는 문제점을 가지고 있었다. 또한, 자성체 막의 두께가 증가하면, 도선막에 전류를 흘려 발생하는 자장은 도선막으로부터의 거리의 제곱에 반비례하므로, 두꺼운 자성체 막 전체에 강한 자장을 인가하기 위해서는, 도선막에 흘리는 전류를 증가시켜야만 한다는 문제점을 안고 있었다. (중략)

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.76-84
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• 2014

As the number of high-density videos increase, parallel processing approaches are necessary to process a large-scale of video data. When a processing method of video data requires thousands of simple operations, GPU-based parallel processing is preferred to CPU-based parallel processing by way of reducing the time and space complexities of a given computation problem. This paper studies the parallel design and implementation of a shot-boundary detection algorithm. The proposed shot-boundary detection algorithm uses pixel brightness comparisons and global histogram data among the blocks of frames, and the computation of these data is characterized with the high parallelism for the related operations. In order to maximize these operations in parallel, the computations of the pixel brightness and histogram are designed in parallel and implemented in NVIDIA GPU. The GPU-based shot detection method is tested with 10 videos from the set of videos in National Archive of Korea. In experiments, the detection rate is similar but the computation time is about 10 time faster to that of the CPU-based algorithm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.11
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• pp.24-32
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• 2002

In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM(or SRAM) cell. Layout pitch of one-bit-wide logic is identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1)simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering, like smoothing and segmentation, may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.

• Journal of the Korea Computer Industry Society
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• v.2 no.9
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• pp.1183-1190
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• 2001

In this paper, it used a different pipeline method from conventional method which is encoding the video signal of analog with digital. It designed with pipeline structure of 4 phases as the pixel clock ratio of the whole operation of the encoder, and secured the stable operational timing of the each sub-blocks, it was visible the effect which reduces a gate possibility as designing by the ROM table or the shift and adder method which is not used a multiplication flag method of case existing of multiplication of the fixed coefficient. The designed encoder shared with the each sub-block and it designed the FPGA using MAX+PLUS2 with VHDL.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.608-611
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• 2008

정보화 사회가 진행되어감에 따라 카메라 센서, 디지털 카메라, 휴대폰, 영상 관련디지털 기기들이 증가하고 이로 인하여 영상정보 서비스 기술의 중요성이 크게 부각되었다. 특히 멀티미디어 응용서비스 기술에서는 영상 정보가 필수적인데, 그 영상 정보의 양이 너무 방대하여 압축 부호화를 하여 사용되고 있다. 본 논문에서는 정지영상압축 방법 중 JPEG표준에서 제시한 4가지 동작 모드 중 베이스라인을 기반으로 하는 JPEG 알고리즘을 연구하여 Motion JPEG에서 동작 가능한 디코더를 C언어를 통해 시뮬레이션하고 최적화된 결과를 VHDL로 구현하였다. Motion JPEG의 무선전송 환경에 적용 가능한 불규칙한 스트리밍 방식의 입력데이터의 처리가 가능한 파이프라인 구조로 설계하였다. 설계결과 Xilinx XC3S1000 FG676-4 환경에서 66.130MHz의 동작속도를 나타내었고 최초 223클록의 딜레이 이후 매 클록마다 화소데이터를 얻을 수 있었다 Motion JPEG 디코더를 설계하는데 사용된 게이트는 총 54,143개이다.

• The KIPS Transactions:PartB
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• v.17B no.1
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• pp.47-54
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• 2010

Old archived film shows two major defects: line scratch and blobs. In this paper, we present a design and implementation of an automatic video restoration system for line scratches observed in archived film. We use autoregressive (AR) image model because we can make stochastic and specifically autoregressive image generation process with our PAST-PRESENT model and Sampling Pattern. We designed locality maximizing scanning pattern, which can generate nearly stationary time-like series of pixels, which is a strong requirement for a stochastic series to be autoregressive. The sampled pixel series undergoes filtering and model fitting using Durbin-Levinson algorithm before interpolation process. We designed three-stage film restoration system, which includes (1) film acquisition from VHS tapes, (2) simple line scratch detection and restoration, and (3) manual blob identification and sophisticated inpainting scheme. We implemented film acquisition and simple inpainting scheme on Texas Instruments DSP board TMS320DM642 EVM, and implemented our AR inpainting scheme on PC for sophisticated restoration. We experimented our scheme with two old Korean films: "Viva Freedom" and "Robot Tae-Kwon-V", and the experimental results show that our scheme improves Bertalmio's scheme for subjective quality (MOS), objective quality (PSNR), and especially restoration ratio (RR), which reflects how much similar to the manual inpainting results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.1
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• pp.133-142
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• 2012

In this paper, we propose and implement a high-speed algorithm for CGH that is to calculate digital hologram by modeling the interference phenomenon for tow lights. This algorithm changes the computation equations into a parallel-computable ones and implements it with a structure consisting of two kinds of cells (initial calculation cell, and update calculation cell). The parallel computation algorithm is to get the rest hologram pixels concurrently after calculation the first hologram column. Here, the initial calculation cells compute the first column of the hologram and the update calculation cells compute the rest of the hologram. The two kinds of cells performs a pipeline operation to complete the operations of the two cells at the same time. A CGH calculator to compute the hole hologram for a light source is structured by arranging the two kinds of cells. Results from simulation showed that the maximum operation frequency is about 215MHz. So, experiments are performed by setting this frequency and the same environments as the method showing the best performance. As the results, the proposed one could complete the computation of 81.75 CGH frames per second, while the previous method computes 62.9 CGH frames per second.