• Title/Summary/Keyword: 하드웨어 최적화

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User Customized Web Interface Design Optimized for SaaS-based Digital Library System -focusing on the LinkSaaS Website- (SaaS 기반 전자도서관 시스템에 최적화된 사용자 맞춤형 웹 인터페이스 디자인 -LinkSaaS 웹사이트를 중심으로-)

  • Oh, Hyoung-Yong;Min, Byoung-Won;Oh, Yong-Sun
    • The Journal of the Korea Contents Association
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    • v.11 no.5
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    • pp.148-156
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    • 2011
  • Recently, an introduction of the cloud computing causes rapid changes in every aspect of the internet environments including hardware, operating systems, applications, and their services. As the cloud computing environment based on SaaS are being developed to a form in which web platform technology and web cloud services are converged. The digital library system also has been being developed to a service model optimized to SaaS based cloud computing environment, which are different from ASP technology. From the web interface point of view, user customization of the SaaS based cloud computing environment is the most important fact. Therefore, this research work suggests a customized web interface considering usability and accessibility so that enterprises and individual users can be able to do an effortless internet browsing under the cloud computing environment. For this purpose, usability tests were carried out as the user customized web interface design were developed and applied to the LinkSaaS website. This paper work lastly presents an UI environment on which customized interface design for individual users can be formulated.

ASIC Design of Lifting Processor for Motion JPEG2000 (Motion JPEG2000을 위한 리프팅 프로세서의 ASIC 설계)

  • Seo Young-Ho;Kim Dong-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.5C
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    • pp.344-354
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    • 2005
  • In this paper, we proposed a new lifting architecture for JPEG2000 and implemented to ASIC. We proposed a new cell to execute unit calculation of lifting using the property of lifting which is the repetitious arithmetic with same structure, and then recomposed the whole lifting by expanding it. After the operational sequence of lifting arithmetic was analyzed in detail and the causality was imposed for implementation to hardware, the unit cell was optimized. A new lifting kernel was organized by expanding simply the unit cell, and a lifting processor was implemented for Motion JPEG2000 using it. The implemented lifting kernel can accommodate the tile size of $1024{\times}1024$, and support both lossy compression using the (9,7) filter and lossless compression using (5,3) filter. Also, it has the same output rate as input rate, and can continuously output the wavelet coefficients of 4 types(LL, LH, HL, HH) at the same time. The implemented lifting processor completed a course of ASIC using $0.35{\mu}m$ CMOS library of SAMSUNG. It occupied about 90,000 gates, and stably operated in about 150MHz though difference from the used macro cell for the multiplier. Finally, the improved operated in about 150MHz though difference from the used macro cell for the multiplier. Finally, the performance can be identified in comparison with the previous researches and commercial IPs.

Case Analysis of Applications of Seismic Data Denoising Methods using Deep-Learning Techniques (심층 학습 기법을 이용한 탄성파 자료 잡음 제거 적용사례 분석)

  • Jo, Jun Hyeon;Ha, Wansoo
    • Geophysics and Geophysical Exploration
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    • v.23 no.2
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    • pp.72-88
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    • 2020
  • Recent rapid advances in computer hardware performance have led to relatively low computational costs, increasing the number of applications of machine-learning techniques to geophysical problems. In particular, deep-learning techniques are gaining in popularity as the number of cases successfully solving complex and nonlinear problems has gradually increased. In this paper, applications of seismic data denoising methods using deep-learning techniques are introduced and investigated. Depending on the type of attenuated noise, these studies are grouped into denoising applications of coherent noise, random noise, and the combination of these two types of noise. Then, we investigate the deep-learning techniques used to remove the corresponding noise. Unlike conventional methods used to attenuate seismic noise, deep neural networks, a typical deep-learning technique, learn the characteristics of the noise independently and then automatically optimize the parameters. Therefore, such methods are less sensitive to generalized problems than conventional methods and can reduce labor costs. Several studies have also demonstrated that deep-learning techniques perform well in terms of computational cost and denoising performance. Based on the results of the applications covered in this paper, the pros and cons of the deep-learning techniques used to remove seismic noise are analyzed and discussed.

ASIC Design of Lifting Processor for Motion JPEG2000 (Motion JPEG2000을 위한 리프팅 프로세서의 ASIC 설계)

  • Seo Young-Ho;Kim Dong-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.7C
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    • pp.647-657
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    • 2005
  • In this paper, we proposed a new lifting architecture for JPEG2000 and implemented to ASIC. We proposed a new cell to execute unit calculation of lifting using the property of lifting which is the repetitious arithmetic with same structure, and then recomposed the whole lifting by expanding it. After the operational sequence of lifting arithmetic was analyzed in detail and the causality was imposed for implementation to hardware, the unit cell was optimized. A new lifting kernel was organized by expanding simply the unit cell, and a lifting processor was implemented for Motion JPEG2000 using it. The implemented lifting kernel can accommodate the tile size of 1024$\times$1024, and support both lossy compression using the (9,7) filter and lossless compression using (5,3) filter. Also, it has the same output rate as input rate, and can continuously output the wavelet coefficients of 4 types(LL, LH, HL, HH) at the same time. The implemented lifting processor completed a course of ASIC using 0.35$\mu$m CMOS library of SAMSUNG. It occupied about 90,000 gates, and stably operated in about 150MHz though difference from the used macro cell for the multiplier. Finally, the improved operated in about 150MHz though difference from the used macro cell for the multiplier. Finally, the performance can be identified in comparison with the previous researches and commercial IPs.

IEEE 802.11-based Power-aware Location Tracking System (저전력을 고려한 IEEE 802.11 기반 위치 추적 시스템)

  • Son, Sang-Hyun;Baik, Jong-Chan;Baek, Yun-Ju
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.7B
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    • pp.578-585
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    • 2012
  • Location tracking system through GPS and Wi-Fi is available at no additional cost in an environment of IEEE 802.11-based wireless network. It is useful for many applications in outdoor environment. However, a previous systems used for general device to tag. It is unsuitable for power aware location tracking system because general devices is more expensive and non-optimized for tracking. The hand-off method of IEEE 802.11 standard is not enough considering power consumption. This thesis analyzes the previous location tracking systems and proposes power aware system. First, we designed and implemented tag to optimize location tracking. Next, we propose low-power hand-off method and low-power behavior model in implemented tag. The proposed hand-off method resolve power problem by using the location information and behavior model minimize power consumption of tag through power-saving mode and the concept of duty cycle. To evaluating proposed methods and system performance, we perform simulations and experiments in real environment. And then, we calculate tag's power consumption based on the actual measured current consumption of each operation. In a simulation result, the proposed behavior model and hand-off method reduced about 98%, 59% than the standard's hand-off and default behavior model.

Development of a Photoplethysmographic method using a CMOS image sensor for Smartphone (스마트폰의 CMOS 영상센서를 이용한 광용적맥파 측정방법 개발)

  • Kim, Ho Chul;Jung, Wonsik;Lee, Kwonhee;Nam, Ki Chang
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.6
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    • pp.4021-4030
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    • 2015
  • Pulse wave is the physiological responses through the autonomic nervous system such as ECG. It is relatively convenient because it can measure the signal just by applying a sensor on a finger. So, it can be usefully employed in the field of U-Healthcare. The objects of this study are acquiring the PPG (Photoplethysmography) one of the way of measuring the pulse waves in non-invasive way using the CMOS image sensor on a smartphone camera, developing the portable system judging stressful or not, and confirming the applicability in the field of u-Healthcare. PPG was acquired by using image data from smartphone camera without separate sensors and analyzed. Also, with that image signal data, HRV (Heart Rate Variability) and stress index were offered users by just using smartphone without separate host equipment. In addition, the reliability and accuracy of acquired data were improved by developing additional hardware device. From these experiments, we can confirm that measuring heart rate through the PPG, and the stress index for analysis the stress degree using the image of a smartphone camera are possible. In this study, we used a smartphone camera, not commercialized product or standardized sensor, so it has low resolution than those of using commercialized external sensor. However, despite this disadvantage, it can be usefully employed as the u-Healthcare device because it can obtain the promising data by developing additional external device for improvement reliability of result and optimization algorithm.

Direct Pass-Through based GPU Virtualization for Biologic Applications (바이오 응용을 위한 직접 통로 기반의 GPU 가상화)

  • Choi, Dong Hoon;Jo, Heeseung;Lee, Myungho
    • KIPS Transactions on Software and Data Engineering
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    • v.2 no.2
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    • pp.113-118
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    • 2013
  • The current GPU virtualization techniques incur large overheads when executing application programs mainly due to the fine-grain time-sharing scheduling of the GPU among multiple Virtual Machines (VMs). Besides, the current techniques lack of portability, because they include the APIs for the GPU computations in the VM monitor. In this paper, we propose a low overhead and high performance GPU virtualization approach on a heterogeneous HPC system based on the open-source Xen. Our proposed techniques are tailored to the bio applications. In our virtualization framework, we allow a VM to solely occupy a GPU once the VM is assigned a GPU instead of relying on the time-sharing the GPU. This improves the performance of the applications and the utilization of the GPUs. Our techniques also allow a direct pass-through to the GPU by using the IOMMU virtualization features embedded in the hardware for the high portability. Experimental studies using microbiology genome analysis applications show that our proposed techniques based on the direct pass-through significantly reduce the overheads compared with the previous Domain0 based approaches. Furthermore, our approach closely matches the performance for the applications to the bare machine or rather improves the performance.

A Design of Point Scalar Multiplier for Binary Edwards Curves Cryptography (이진 에드워즈 곡선 암호를 위한 점 스칼라 곱셈기 설계)

  • Kim, Min-Ju;Jeong, Young-Su;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.8
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    • pp.1172-1179
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    • 2022
  • This paper describes a design of point scalar multiplier for public-key cryptography based on binary Edwards curves (BEdC). For efficient implementation of point addition (PA) and point doubling (PD) on BEdC, projective coordinate was adopted for finite field arithmetic, and computational performance was improved because only one inversion was involved in point scalar multiplication (PSM). By applying optimizations to hardware design, the storage and arithmetic steps for finite field arithmetic in PA and PD were reduced by approximately 40%. We designed two types of point scalar multipliers for BEdC, Type-I uses one 257-b×257-b binary multiplier and Type-II uses eight 32-b×32-b binary multipliers. Type-II design uses 65% less LUTs compared to Type-I, but it was evaluated that it took about 3.5 times the PSM computation time when operating with 240 MHz. Therefore, the BEdC crypto core of Type-I is suitable for applications requiring high-performance, and Type-II structure is suitable for applications with limited resources.

Design and Implementation of BNN based Human Identification and Motion Classification System Using CW Radar (연속파 레이다를 활용한 이진 신경망 기반 사람 식별 및 동작 분류 시스템 설계 및 구현)

  • Kim, Kyeong-min;Kim, Seong-jin;NamKoong, Ho-jung;Jung, Yun-ho
    • Journal of Advanced Navigation Technology
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    • v.26 no.4
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    • pp.211-218
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    • 2022
  • Continuous wave (CW) radar has the advantage of reliability and accuracy compared to other sensors such as camera and lidar. In addition, binarized neural network (BNN) has a characteristic that dramatically reduces memory usage and complexity compared to other deep learning networks. Therefore, this paper proposes binarized neural network based human identification and motion classification system using CW radar. After receiving a signal from CW radar, a spectrogram is generated through a short-time Fourier transform (STFT). Based on this spectrogram, we propose an algorithm that detects whether a person approaches a radar. Also, we designed an optimized BNN model that can support the accuracy of 90.0% for human identification and 98.3% for motion classification. In order to accelerate BNN operation, we designed BNN hardware accelerator on field programmable gate array (FPGA). The accelerator was implemented with 1,030 logics, 836 registers, and 334.904 Kbit block memory, and it was confirmed that the real-time operation was possible with a total calculation time of 6 ms from inference to transferring result.

Performance Evaluation and Analysis on Single and Multi-Network Virtualization Systems with Virtio and SR-IOV (가상화 시스템에서 Virtio와 SR-IOV 적용에 대한 단일 및 다중 네트워크 성능 평가 및 분석)

  • Jaehak Lee;Jongbeom Lim;Heonchang Yu
    • The Transactions of the Korea Information Processing Society
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    • v.13 no.2
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    • pp.48-59
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    • 2024
  • As functions that support virtualization on their own in hardware are developed, user applications having various workloads are operating efficiently in the virtualization system. SR-IOV is a virtualization support function that takes direct access to PCI devices, thus giving a high I/O performance by minimizing the need for hypervisor or operating system interventions. With SR-IOV, network I/O acceleration can be realized in virtualization systems that have relatively long I/O paths compared to bare-metal systems and frequent context switches between the user area and kernel area. To take performance advantages of SR-IOV, network resource management policies that can derive optimal network performance when SR-IOV is applied to an instance such as a virtual machine(VM) or container are being actively studied.This paper evaluates and analyzes the network performance of SR-IOV implementing I/O acceleration is compared with Virtio in terms of 1) network delay, 2) network throughput, 3) network fairness, 4) performance interference, and 5) multi-network. The contributions of this paper are as follows. First, the network I/O process of Virtio and SR-IOV was clearly explained in the virtualization system, and second, the evaluation results of the network performance of Virtio and SR-IOV were analyzed based on various performance metrics. Third, the system overhead and the possibility of optimization for the SR-IOV network in a virtualization system with high VM density were experimentally confirmed. The experimental results and analysis of the paper are expected to be referenced in the network resource management policy for virtualization systems that operate network-intensive services such as smart factories, connected cars, deep learning inference models, and crowdsourcing.