• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6B
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• pp.1183-1190
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• 1999

This paper presents an efficient hardware architecture to improve the frame memory interface occupying the largest hardware area together with motion estimator in implementing MPEG-2 video encoder as an ASIC chip. In this architecture, the memory size for internal data buffering and hardware area for frame memory interface control logic are reduced through the efficient memory map organization of the external SDRAM having dual bank and memory access timing optimization between the video encoder and external SDRAM. In this design, 0.5 m, CMOS, TLM (Triple Layer Metal) standard cells are used as design libraries and VHDL simulator and logic synthesis tools are used for hardware design add verification. The hardware emulator modeled by C-language is exploited for various test vector generation and functional verification. The architecture of the improved frame memory interface occupies about 58% less hardware area than the existing architecture[2-3], and it results in the total hardware area reduction up to 24.3%. Thus, the (act that the frame memory interface influences on the whole area of the video encoder severely is presented as a result.

• Korean Journal of Remote Sensing
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• v.31 no.3
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• pp.267-279
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• 2015

In the development of autonomous vehicles, the importance of LIDAR sensors becomes larger. For sensor selection or algorithm development, it is difficult to test expensive LIDAR sensors mounted on a vehicle under various driving environment. In this study, we developed a simulator that is generally applicable for various vehicle LIDAR sensors based on the generalized geometric modeling of the common processes associated with vehicle LIDAR sensors. By configuring this simulator with the specific sensors being widely used, we performed the data simulation and quality analysis. Also, we applied the simulation data to obstacle detection and evaluated the applicability of the selected sensor. The developed simulator enables various experiments and algorithm development in parallel with hardware implementation prior to the deployment and operation of a sensor.

• Journal of Aerospace System Engineering
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• v.14 no.1
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• pp.16-20
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• 2020

The fatigue happening during the road riding of the vehicle and for the moment the aircraft lands on the runway is closely related to the life cycle of the landing gear, the airframe, the vehicle's suspension, etc. The multiple loads acting on the wheel are longitudinal, lateral, vertical, and braking forces. To study the dynamic characteristics and fatigue stiffness of the vehicle, the dynamic fatigue simulator generally has been used to represent the real road vibration in the lab. It can save time and cost. In hardware, the critical factor in the hydraulic fatigue simulator structure is to decouple each axis and to endure several load vibration. In this paper, the inverse kinematic analysis method derives the magnitude of movement of the hydraulic servo actuator by the coupling after rendering the maximum movement displacement in the axial direction at the center of the dummy wheel. The result of the analysis is that the coupling between the axes is weak to reproduce the real road vibrations precisely.

• Journal of Korea Multimedia Society
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• v.15 no.4
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• pp.560-568
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• 2012

As for the implementation technology of virtual space, the experience method becomes multifunctional and it recognizes movement, sound, temperature and pressure and is expanding to the studies on the interaction possible intelligent interaction technology field between contents and users. The virtual reality technology is being studied to apply the 3D graphic technology and physical phenomena to virtual space to increase the sense of reality and use hardware devices to the virtual environment to increase immersive experience. The production of interactive contents about the virtual underwater environment needs bidirectional interface technology to connect hardware devices and ocean contents in order to increase the sense of a user to increase the sense of immersion. In this study, it tried to express the virtual underwater environment with the sense of actuality and reality from the analysis of the environmental factors according to changes in depth of water and from the application of the normalized underwater physical laws. Also it was to develop sensory contents having to experience the skin scuba without directly entering the water by connecting a sensory simulator about the skin scuba with the virtual underwater environment.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.7
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• pp.46-56
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• 2002

In this paper, we describe a hardware-software co-verification methodology and environment in developing a mobile station modem chip for cdma2000 1x which is one of the 3rd generation mobile communication standards. By constructing an efficient co-verification environment for a register-transfer-level hardware model and a physical-layer software model combining a channel link simulator and a versatile test-bench, we can drastically reduce both time and cost for developing a complex three-million-gate class system integrated circuit.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.6
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• pp.56-68
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• 2003

Difficult problems In implementing digital neural network hardware are the extension of synapses and the programmability for relocating neurons. In this paper, the structure of a new hardware is proposed for solving these problems. Our structure based on traditional SIMD can be dynamically and easily reconfigured connections of network without synthesizing and mapping original design for each use. Using additional modular processing unit the numbers of neurons find synapses increase. To show the extensibility of our structure, various models of neural networks : multi-layer perceptrons and Kohonen network are formed and tested. The performance comparison with software simulation shows its superiority in the aspects of performance and flexibility.

• Journal of Korean Society of Transportation
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• v.19 no.5
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• pp.71-83
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• 2001

This paper introduces the simulation system which was developed to evaluate the effectiveness of ITS, and presents its adaptabilities to traffic signal control systems. The simulation system in this paper has a function of real-time testing and evaluating traffic control systems. It consists of Modu-RE which is a simulation operating software and Real-CID which is a controller interface device. Real-CID allows Modu-RE to communicate with traffic control hardware.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.337-340
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• 2009

Since a hardware accelerator for 3D graphics processing GPU(Graphics Processing Unit)'s performance has been improving constantly. This is the efficient way was introduced for complex graphics application, but it is rarely used to utilize 100% resources on GPU. GP-GPU(general-purpose GPU), including operations on the GPU and supporting common operations can be handled by the processor, is noted by depending on the distribution of resources that can be effectively controlled. In this paper, the simulator was implemented that supports virtual environment of GP-GPU and available for program design and debugging. Through this, the co-design development environment support simultaneous design fast and reliable verification that are available to build the interface of three-dimensional graphics display.

• Proceedings of the KWS Conference
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• 2010.05a
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• pp.49-49
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• 2010

용접은 산업계의 기계 조립 및 접합을 위한 공정의 주요한 작업으로 조선, 중공업, 건설 등 산업현장에서 사람에 의한 수동적인 작업으로 대부분 수행된다. 이러한 용접 작업을 수행하는 용접 기술자는 산업 현장 훈련원과 직업 교육 학교에서 양성되지만 용접 훈련 과정은 실습 초보자에게 위험하고, 장시간 교육하기에 어려울 뿐 아니라 재료 낭비, 의사 소통의 한계, 즉석 결과 평가의 한계, 공간부족 등 다양한 문제가 있다. 그러므로, 안전하고 반복적인 실습 환경 제공하고 장시간 및 다수 교육참여 지원 등이 가능한 시스템을 구축하여 숙련된 우수 인력 조기 확보와 훈련 비용을 절감할 필요가 있다. 본 논문에서는 실제와 동일한 상호작용을 제공할 뿐만 아니라 고품질로 훈련 환경을 가시화하여 용접 상황을 동일하게 모사하는 가상 현실 기반 용접 훈련 시뮬레이터를 제시한다. 이 시스템은 용접의 형상과 환경의 고품질 가시화, 경험 DB를 통한 용접의 비드 형상 데이터 획득, 용접 토치를 이용하는 사용자 상호작용, 용접 훈련 결과 평가 및 최적 작업 가이드, 용접 콘텐츠 저작, 다양한 용접 훈련을 가시화하는 하드웨어 플랫폼으로 구성된다. 고품질 가상 용접 가시화는 경험 DB 기반 비드 형상 데이터와 신경회로망을 이용한 비드 형상 예측을 통해 실시간 비드 표현이 이루어지며 쉐이더 기반 고품질 모재 및 비드 표현, 아크 불꽃 효과 표현을 포함한다. 사용자 상호작용은 현장 작업 도구와 일치된 토치 인터페이스와 위치추적을 이용하여 토치의 작업각, 진행각, 속도, 거리 등을 반영할 수 있으며 진동과 소리 등 용접 훈련의 사실적 상호작용도 재현하였다. 용접 훈련 평가 및 최적 작업 가이드는 훈련자의 용접속도, 거리, 각도 등의 사용자 작업 결과를 그래픽으로 표현하고, 애니메이션을 통한 훈련 자세를 추후 분석할 수 있도록 하였고, 가상토치, 기준선, 수치계기 등을 이용한 최적 작업 훈련 가이드 제시하였다. 훈련 콘텐츠 저작은 메뉴UI 기반으로 용접의 전류, 전압 등의 조건과 상황을 선택하도록 제시하였고, 하드웨어 플랫폼은 워크벤치형 입체 디스플레이 방식으로 용접 환경을 가시화하였고, 위, 정면, 아래보기 등 다양한 용접 자세 변경을 지원 할 수 있도록 구축하였다. 이러한 가상현실 기반 훈련 시뮬레이터는 아크열 발생에 따른 장시간 훈련의 어려움을 극복할 수 있고, 다양한 실습 환경을 바꾸어 가며 반복적인 훈련이 가능하고, 실 재료를 사용하지 않아 재료의 낭비를 줄일 수 있는 환경 친화적인 안전하고 효율적인 훈련 실습 환경을 제공할 수 있다.

• Journal of KIISE:Computer Systems and Theory
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• v.33 no.12
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• pp.867-879
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• 2006

This paper concerns fast and time accurate HW/SW cosimulation for MPSoC(Multi-Processor System-on-chip) architecture where multiple software and/or hardware components exist. It is becoming more and more common to use MPSoC architecture to design complex embedded systems. In cosimulation of such architecture, as the number of the component simulators participating in the cosimulation increases, the time synchronization overhead among simulators increases, thereby resulting in low overall cosimulation performance. Although SystemC cosimulation frameworks show high cosimulation performance, it is in inverse proportion to the number of simulators. In this paper, we extend the novel technique, called virtual synchronization, which boosts cosimulation speed by reducing time synchronization overhead: (1) SystemC simulation is supported seamlessly in the virtual synchronization framework without requiring the modification on SystemC kernel (2) Parallel execution of component simulators with virtual synchronization is supported. We compared the performance and accuracy of the proposed parallel SystemC cosimulation framework with MaxSim, a well-known commercial SystemC cosimulation framework, and the proposed one showed 11 times faster performance for H.263 decoder example, while the accuracy was maintained below 5%.