• Title/Summary/Keyword: 플리커

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A 2.3-2.7 GHz Dual-Mode RF Receiver for WLAN and Mobile WiMAX Applications in $0.13{\mu}m$ CMOS (WLAN 및 Mobile WiMAX를 위한 2.3-2.7 GHz 대역 이중모드 CMOS RF 수신기)

  • Lee, Seong-Ku;Kim, Jong-Sik;Kim, Young-Cho;Shin, Hyun-Chol
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.3
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    • pp.51-57
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    • 2010
  • A dual-mode direct conversion receiver is developed in $0.13\;{\mu}m$ RF CMOS process for IEEE 802.11n based wireless LAN and IEEE 802.16e based mobile WiMAX application. The RF receiver covers the frequency band between 2.3 and 2.7 GHz. Three-step gain control is realized in LNA by using current steering technique. Current bleeding technique is applied to the down-conversion mixer in order to lower the flicker noise. A frequency divide-by-2 circuit is included in the receiver for LO I/Q differential signal generation. The receiver consumes 56 mA at 1.4 V supply voltage including all LO buffers. Measured results show a power gain of 32 dB, a noise figure of 4.8 dB, a output $P_{1dB}$ of +6 dBm over the entire band.

A Study on the Outages Due to Voltage Expanding in Closing High Voltage Capacitor (고압 커패시터 투입시 전압확대에 따른 사고 사례 연구)

  • Cho, Nam-Hoon;Jung, Jum-Soo;Park, Yong-Woo;Ha, Bok-Nam;Lee, Hyung-Ho
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.9
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    • pp.94-102
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    • 2008
  • Capacitor switching is essential for the economic operation and proper voltage control of KOREA electric utility distribution system. Voltage transients produced by capacitor switching (around 2.0 per unit at substation and 2.5 or less per unit at customer site, and lasting less then 1[ms]) do not have the magnitude or duration to interfere with the operation of computers, but they do disrupt the operation of adjustable speed drivers. The result of our research, ASD manufacturers should learn from the computer industry and design products that will operate satisfactory In the electrical envelopment in which they will be placed. In this case history, the inductors on the input to ADSs in order to prevent nuisance tripping from capacitor switching(and other causes within the apartment) proved to be an effective, low-cost solution.

A Study on the Driving of Ballast for 35W Class (T5 Class) Fluorescent Lamp using a Piezoelectric Transformer Characteristic (압전 변압기 특성을 이용한 35W급(T5급) 형광등용 안정기 구동에 관한 연구)

  • Hwang, Lark-Hoon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.9 no.3
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    • pp.638-644
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    • 2008
  • It is required small size electronic ballast to fullfill the design philosophy of miniaturizing in the application of slim lamps. However, the traditional magnetic ballasts operated at 50-60Hz have been suffered from noticeable flicker, high loss, large crest factor and heavy weight. In this study, in order to solve these problems, It was proposed for driving 35W Class fluorescent lamp in the new type of electronic ballast, which is composed of rectifier, active power factor corrector, series resonant half bridge inverter and piezoelectric transformer. A 35W class(T5 class) fluorescent lamp is driven to successful by the fabricated ballast with piezoelectric transformer. Experimental results, It is proposed to driving the lamp using a electronic ballast at operating frequency of $75{\sim}79kHz$ approximatively. It is operated after for 25 min that were obtained good results of the input power factor of 0.95 and efficiency of 86%, respectively.

Analysis and Measurement of the Magnetic Fields Cause by Operation of Electromotive Installations (電動力設備의 運轉에 의해 發生되는 磁界의 測定과 解析)

  • Lee, Bok Hui
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.9 no.2
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    • pp.146-146
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    • 1995
  • 본 논문은 유도전동기의 운전조작시에 발생되는 자계변화특성에 대하여 기술하였다. 본 측정시스템은 자기적분형 자계센서, 증폭기, 능동형 적분기로 이루어졌으며, 교정실험에 대한 측정계의 주파수대역과 감도는 각각 20[Hz]∼0.234[mV/μT]이다. 유도전동기의 기동과 정상운전중에 발생하는 자계성분을 측정하였으며, 고조파 성분을 고속 푸리에 변환기법으로 분석하였다. 유도전동기의 직입기동시에는 단일성 펄스자계가 강하게 발생하였으며, 이의 피크치는 정상상태의 값보다 5배이상 크게 나타났다. 이러한 긴 과도시간과 강한 자계의 세기는 전동기의 큰 인덕턴스와 동특성에 기인된다. 유도전동기의 정상운전시에는 유도전동기의 극수에 의존하는 기본파에 대한 분조파의 자계성분이 관측되었다. 또한, 자계의 분조파 성분은 전동기의 토크 변동으로 불균일한 회전토크로 인해 생기는 맥동전류와 전압플리커에 의해서 발생하는 것으로 생각된다. 인버터구동형 유도전동기에서는 직입기동에 비하여 많은 고조파 성분이 발생되고 있었으며, 특히 전동기의 구동주파수가 낮을수록 맥동토크에 의한 전류변화로 고조파 성분은 더욱 증가하였다.

Robust Motion Estimation for Luminance Fluctuation Sequence (조명 변화에 강건한 움직임 추정 기법)

  • Lee, Im-Geun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.8
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    • pp.1918-1924
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    • 2010
  • This In this paper, we propose an efficient algorithm for motion estimation of the image sequences with luminance fluctuation. For such sequences, conventional motion estimation methods based on the difference of pixel values usually produce the erroneous motion information. The proposed algorithm defines the luminance fluctuation as a linear model with gain and offset parameter, and extracts motion information using gradient and phase of the corresponding local region within consecutive frames. Therefor the method is robust to the luminance change of the frames. We test our algorithm for the ground truth sequence with artificially added luminance change and motion, and real sequences corrupted by the flicker. The results shows that the proposed algorithm outperforms the conventional methods.

A Study on Dimming Improvement and Flicker Reduction in Visible Light Communication System (가시광통신 시스템에서 디밍 향상 및 플리커 감소 방안에 대한 연구)

  • Doo-Hee, Han;Kyu-Jin, Lee
    • Journal of Industrial Convergence
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    • v.21 no.2
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    • pp.125-131
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    • 2023
  • In this paper, research was conducted to solve the problem of reducing the dimming level and flicker that occurs in the visible light communication system. Visible light communication is a convergence technology that provides both communication and lighting, and must satisfy not only communication performance but also lighting performance. However, since the existing data transmission method transmits without considering the transmission data sequence, it reduces the dimming level and causes a flicker phenomenon. To solve this problem, in this paper, the Dimming Improvement and Flicker Reduction Mapping technique was studied. Existing systems simply transmitted data of '0' and '1', but in this system, original data transmission channels and DIFR (Dimming Improvement and Flicker Reduction) transmission channels are assigned to RGB channels. Original data is allocated to the R channel and original data or inverse original data is allocated to the DIFR-G channel, and the DIFR-B channel maintains the maximum dimming level by transmitting through the logical operation of the R channel and the G channel. At the same time, the flicker phenomenon is prevented by preventing continuous occurrence of 'OFF' patterns. Through this, we proposed an adaptive data allocation algorithm that can faithfully play a role as a light as well as a communication function.

Evolution strategies of Digital Camera to cope with the progress of the Imaging Device and Web (이미징 디바이스 및 웹의 발전에 대응한 디지털 카메라의 진화전략에 관한 연구)

  • An, Ho-Seong;Byeon, Sang-Yeong;Kim, Jae-Beom
    • Proceedings of the Korean Society for Emotion and Sensibility Conference
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    • 2009.11a
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    • pp.79-82
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    • 2009
  • 본 연구는 인터넷의 진화 및 이미징 디바이스 전반의 발달에 따른 디지털 카메라의 진화 전략을 다룬 논문이다. 오늘날의 카메라 기술은 하루가 다르게 발전해 나가고 있다. 수동 필름 카메라에서부터 최첨단 하이브리드(hybrid) 카메라에 이르기 까지 카메라는 끊임없이 진화해 왔으며 사용자 계층 역시 다양해지고 있다. 디지털이 적용된 디지털 카메라의 경우, 웹의 발전과 더불어 활용도가 다양해 짐에 따라서 기존에는 전문가와 비전문가 계층으로 명확하게 나뉘던 사용자 계층도 그 경계가 모호해졌으며 사용자의 수 역시 비약적으로 증가하였다. 수많은 사업자들이 디지털 카메라 시장에 진출함에 따라, 높은 성장세가 지속되던 컴팩트 카메라 (compact camera)시장은 과포화기에 접어들어 성장성이 점차 감소하는 추세에 있으며, 전문가의 영역으로 여겨졌던 DSLR 시장 역시 선발업체의 높은 진입장벽과 이를 극복하기 위한 후발업체의 지속적인 도전으로 인해 경쟁은 치열하고 이익은 내기 어려운 레드 오션(red ocean)이 되었다. 이러한 상황 속에서 디지털 카메라가 활용될 수 있는 대표적 매체인 웹 역시 '웹 2.0' 이라는 용어가 생길 정도로 발전했다. 웹2.0시대가 본격화되어 서로 다른 사용자들이 자유롭게 컨텐츠를 공유하고 누구든지 쉽게 정보의 생산에 동참할 수 있게 됨으로써 기존의 웹에서 일어나지 않았던 다양한 변화들이 생겨나게 되었다. 본 연구에서는 변화의 특징들을 살펴보기 위해 웹 2.0 시대의 대표적인 컨텐츠 공유 커뮤니티로 자리매김한 야후(Yahoo)사(社) 플리커(Flickr)의 사례를 통해 디지털 카메라 사용자들의 디지털 카메라 사용패턴을 살펴보고 이를 통해 디지털 카메라의 진화를 설명하고자 한다. 인터넷이 발전하며 디지털 카메라와 관련 되어 나타난 대표적인 변화는 일반 소비자가 진화하는 점 이라고 볼 수 있다. 컨텐츠의 공유가 자유로운 웹 플랫폼의 등장, 카메라 기술이 결합된 소형 디지털 단말기의 발전 등으로 인해 비전문가 영역에 속해있던 일반 소비자 계층에 Flickr와 같은 웹 커뮤니티에서의 활동을 통해 준전문가 계층으로 진입하려는 욕구가 생기게 되었는데, 이렇게 형성된 욕구에 따라 디지털 카메라 시장 역시 새로운 수요를 만나게 되었다. 본 연구에서는 경쟁이 치열한 시장 상황 속에서 디지털 카메라의 향후 발전 방향을 알아보기 위해 우선 디지털 카메라 기능을 나누어 본 후, 이미징 디바이스 시장과 웹의 발전 형태에 대해 분석해보았다. 이어 본 연구에서는 분류된 디지털 카메라의 기능을 바탕으로 웹 2.0 시대에 시장을 주도할 수 있는 디지털 카메라의 변화방향에 대해서 알아보았다. 본 연구는 감성적 및 이성적 측면에서 디지털 카메라의 향후 전개방향을 살펴보았다는 점에서 이론적 실무적 함의를 가지는 논문이라고 사료된다.

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Comparison of PI and PR Controller Based Current Control Schemes for Single-Phase Grid-Connected PV Inverter (단상 계통 연계형 태양광 인버터에 사용되는 PI 와 PR 전류제어기의 비교 분석)

  • Vu, Trung-Kien;Seong, Se-Jin
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.8
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    • pp.2968-2974
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    • 2010
  • Nowadays, the PV systems have been focused on the grid connection between the power source and the grid. The PV inverter can be considered as the core of the whole system because of an important role in the grid-interfacing operation. An important issue in the inverter control is the load current regulation. In the literature, Proportional Integral (PI) controller, which is normally used in the current-controlled Voltage Source Inverter (VSI), cannot be a satisfactory controller for an AC system because of the steady-sate error and the poor disturbance rejection, especially in high-frequency range. Compared with conventional PI controller, Proportional Resonant (PR) controller can introduce an infinite gain at the fundamental frequency of the AC source; hence it can achieve the zero steady-state error without requiring the complex transformation and the de-coupling technique. Theoretical analyses of both PI and PR controller are presented and verified by simulation and experiment. Both controller are implemented in a 32-bit fixed-point TMS320F2812 DSP processor and evaluated on a 3kW experimental prototype PV Power Conditioning System (PCS). Simulation and experimental results are shown to verify the controller performances.

A Study on the Fabrication of K-band Local Oscillator Used Frequency Doubler Techniques (주파수 체배 기법을 이용한 K-대역 국부발진기 구현에 관한 연구)

  • 김장구;박창현;최병하
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.10
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    • pp.109-117
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    • 2004
  • In this paper, a K-band local oscillator composed of a VCDRO(Voltage Controlled Dielectric Resonator Oscillator), GaAs MESFET, and Reflector type frequency doubler has been designed and fabricated. TO obtain a good phase noise performance of a VCDRO, a active device was selected with a low noise figure and a low flicker noise MESFET and a dielectric resonator was used for selecting stable and high oscillation frequency. Especially, to have a higher conversion gain than a conventional doubler as well as a good harmonic suppression performance with circuit size reduced a doubler structure was employed as the Reflector type composed of a reflector and a open stub of quarter wave length for rejecting the unwanted harmonics. The measured results of fabricated oscillator show that the output power was 5.8 dBm at center frequency 12.05 GHz and harmonic suppression -37.98 dBc, Phase noise -114 dBc at 100 KHz offset frequency, respectively, and measured results show of fabricated frequency doubler, the output power at 5.8 dBm of input power is 1.755 dBm conversion gain 1.482 dB, harmonic suppression -33.09 dBc, phase noise -98.23 dBc at 100 KHz offset frequency, respectively. This oscillator could be available to a local oscillator in K-band which used frequency doubler techniques.

A 12b 1kS/s 65uA 0.35um CMOS Algorithmic ADC for Sensor Interface in Ubiquitous Environments (유비쿼터스 환경에서의 센서 인터페이스를 위한 12비트 1kS/s 65uA 0.35um CMOS 알고리즈믹 A/D 변환기)

  • Lee, Myung-Hwan;Kim, Yong-Woo;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.3
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    • pp.69-76
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    • 2008
  • This work proposes a 12b 1kS/s 65uA 0.35um CMOS algorithmic ADC for sensor interface applications such as accelerometers and gyro sensors requiring high resolution, ultra-low power, and small size simultaneously. The proposed ADC is based on an algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. Two versions of ADCs are fabricated with a conventional open-loop sampling scheme and a closed-loop sampling scheme to investigate the effects of offset and 1/f noise during dynamic operation. Switched bias power-reduction techniques and bias circuit sharing reduce the power consumption of amplifiers in the SHA and MDAC. The current and voltage references are implemented on chip with optional of-chip voltage references for low-power SoC applications. The prototype ADC in a 0.35um 2P4M CMOS technology demonstrates a measured DNL and INL within 0.78LSB and 2.24LSB, and shows a maximum SNDR and SFDR of 60dB and 70dB in versionl, and 63dB and 75dB in version2 at 1kS/s. The versionl and version2 ADCs with an active die area of $0.78mm^2$ and $0.81mm^2$ consume 0.163mW and 0.176mW at 1kS/s and 2.5V, respectively.