• Title/Summary/Keyword: 펄스 생성기

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Novel High Voltage Generator Circuit Design for Igniting Xenon Lamp (제논램프 구동을 위한 새로운 기법의 고전압 발생회로)

  • Jeon, Byung-Goo;Cho, Jun-Dong
    • Proceedings of the KIPE Conference
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    • 2008.06a
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    • pp.180-182
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    • 2008
  • 제논램프를 점등시키기 위해서는 램프방전 초기에 수십kV의 고전압펄스를 발생시켜주어야 한다. 고전압펄스의 생성은 주로 transformer의 전자기유도작용을 이용한다. 지금까지는 주로 1개의 고주파 transformer를 이용하여 고전압펄스를 발생시키는 회로가 구성되어 왔다. 이 경우 회로가 단순해지는 이점이 있지만 transformer의 부피가 커지게 되어 상대적으로 보드에서 많은 공간을 차지하게 되는 단점이 있다. 따라서 본 논문에서는 기존의 단점을 해결하고자 고주파 transformer 1개를 사용하는 대신 소형의 고주파 transformer 2개를 2단계 step-up 회로로 구성하였다. 제안된 회로의 구성과 동작에 대하여 분석하였고 실험을 통해 제안된 회로가 유용함을 검증하였다.

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Improved 20Mb/s CMOS Optical Receiver for Digital Audio Interfaces (디지털 오디오 인터페이스용 개선된 20Mb/s CMOS 광수신기)

  • Yoo, Jae-Tack;Kim, Gil-Su
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.3 s.357
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    • pp.6-11
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    • 2007
  • This paper proposes CMOS optical receivers to reduce effective area and pulse width distortion (PWD) in high definition digital audio interfaces. To mitigate effective area and PWD, proposed receivers include a frans-impedance amplifier (TIA) with dual output and a level shifter with threshold convergence, respectively. Proposed circuits are fabricated using $0.25{\mu}m$ CMOS process and measured result demonstrated the effective area of $270\times120{\mu}m^2$ and PWD of ${\pm}3%$ for the receiver with a dual output TIA, and the effective area of $410\times140{\mu}m^2$ and PWD of ${\pm}2%$ for the receiver with a threshold convergence level shifter.

On-Chip Digital Temperature Sensor Using Delay Buffers Based the Pulse Shrinking Method (펄스 수축방식 기반의 지연버퍼를 이용한 온-칩 디지털 온도센서)

  • Yun, Seung-Chan;Kim, Tae-Un;Choi, Ho-Yong
    • Journal of IKEEE
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    • v.23 no.2
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    • pp.681-686
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    • 2019
  • This paper proposes a CMOS temperature sensor using inverter delay chains of the same size based on the pulse shrinking method. A temperature-pulse converter (TPC) uses two different temperature delay lines with inverter chains to generate a pulse in proportion to temperature, and a time-digital converter (TDC) shrinks the pulse using inverter chains of the same size to convert pulse width into a digital value to be insensitive to process changes. The chip was implemented with a $0.49{\mu}m{\times}0.23{\mu}m$ area using a $0.35{\mu}m$ CMOS process with a supply voltage of 3.3V. The measurement results show a resolution of $0.24^{\circ}C/bit$ for 9-bit data for a temperature sensor range of $0^{\circ}C$ to $100^{\circ}C$.

A Study on Design and Manufacturing Methods of Dual-Polarization Monopulse Feed Structure in Millimeter-wave(W band) (밀리미터파(W대역) 이중편파 모노펄스 급전 구조 설계 및 제작 방안 연구)

  • Jong-Gyun Baek;Hyeong-Ki Lee;Young-Wan Kim;Hee-Duck Chae;Ji-Han Joo;Jaesik Kim
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.23 no.6
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    • pp.47-53
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    • 2023
  • In this paper, We designed a waveguide-type feed structure that converts millimeter wave dual-polarized signals into monopulse signals and presented a manufacturing method. At millimeter-wave such as the W band, the size of the waveguide is very small, making it very difficult to manufacture complex structures. Therefore, because manufacturability is important for the waveguide-type feed structure in the millimeter-wave, electro forming and diffusion bonding were proposed and verified in this study. The designed monopulse feed structure consists of eight 180° hybrids that combine 90° hybrids and self-compensating phase shifters, and four OMTs to separate dual polarization. The designed feed structure was designed to facilitate electro forming and diffusion bonding, and the manufactured feed structure was verified through a network analyzer. It was confirmed that the two proposed production methods produce a monopulse signal well through the measured magnitude and phase of the port.

Characteristics of Unsteady Flows in a Semi-Induction System by a Variable Volume Helmholtz Resonator (가변 체적 헬름홀츠 공진기에 의한 유사 흡기 시스템의 비정상 유동특성)

  • Kang, K.E.;Kim, K.H.;Kang, H.Y.;Koh, D.K.
    • Journal of Power System Engineering
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    • v.13 no.6
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    • pp.57-62
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    • 2009
  • Unsteady flows in a semi-induction system was investigated to verify their characteristics. A semi-induction system was designed and made to verify the Sow characteristics in an intake system. To attain an intact wave of an intake pulse, a single semi-intake system was adopted as a test rig. The system consists of an intake pipe and a rotary valve as a pulse generator, and a variable volume Helmholtz resonator. The variable volume Helmholtz resonator was mounted in the intake pipe to enhance a breathing capacity and engine performance. The phase and amplitude of the pulsating flow in an unsteady flow system were found to affect the charging capacity significantly. The behavior of pressure wave, their phase and amplitude were investigated in various regions. Some of the results obtained from experiments were described.

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A study on the characteristic of Pockel cell Q-switch for Nd:YAG laser (Nd:YAG Laser를 위한 포켓셀 Q-스위치특성 연구)

  • Kim, Whi-Young
    • Journal of Digital Contents Society
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    • v.10 no.2
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    • pp.199-207
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    • 2009
  • The Q-switching the shutter or the different optical science element puts in within the laser light resonator and the storehouse departs from the within the resonator it loses the mortar and the reversal distribution which when is sufficient creates from within the active medium, opens the shutter instantaneously and it is to do to be made to emit with the light where the energy which is accumulated within the resonator is strong very. Like this Q-switching of laser resonator--It decreases factor increasing suddenly to make. To method of Laser Q-switching mechanical switching methods, electro-optic switching methods and switching by saturable absorber methods, acousto-optic switching method etc. 4 kind are being used on a large scale. In these people the conversion which is electric in compliance with the effect which is electrooptics is widely being used the Q-switching pulse of short pulse width because being it will be able to create. Consequently, Pockel cell where it has the quality of electrooptics effect) the Q-it is become known that it is suitable it uses with switch. From the research which it sees FET and one-chip microprocessor where it is a switching element and pulse transfomer to plan and produce pockel cell Q-switch driving gears, pulse style Nd: It applied in YAG Laser system and it investigated and researched the operating characteristic of the Q-switch. Also, the Q-switch leads and Nd where it is output: YAG with forecast in compliance with a theoretical calculation it comes to buy laser beam side politics it compared and laser beam qualities which had become Q-switching it analyzed.

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DSM Generation using LIDAR and Image Data (라이다 데이터와 항공영상을 이용한 DSM 생성)

  • Hong, Ju-Seok;Choi, Kyoung-Ah;Lee, Im-Pyeong;Min, Seung-Hong
    • Proceedings of the KSRS Conference
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    • 2009.03a
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    • pp.66-71
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    • 2009
  • 최근 가상도시, 위치기반시스템 등 여러 분야에서 도심지역의 고해상도 DSM의 수요가 증가하고 있다. 고해상도 DSM을 획득하는데 항공 라이다 측량은 가장 효율적이고 경제적인 방법으로 인정받고 있다. 그러나 레이저 펄스는 도시건물의 모서리와 코너보다는 주로 표면에서 반사되기 때문에 일반적으로 라이다 DSM은 명확한 수직 breakline을 포함하기 힘들다. 이에 본 연구에서는 라이다 데이터와 항공영상의 결합을 통해서 고품질의 도시지역 DSM을 생성하는 새로운 방법을 제안하고자 한다. 제안된 방법은 (1) 서로 다른 두 센서에서 획득된 라이다 데이터와 영상의 기하 정합, (2) 라이다 데이터를 이용한 영상정합, (3) 영상정합을 통해 획득된 지상점과 라이다 데이터를 이용한 DSM 생성순으로 이루어진다. 영상 정합을 위한 지상점의 초기값으로 대상지의 평균고도를 높이로 사용하는 것이 아니라 라이다 데이터로부터 얻어진 높이를 사용한다면 영상 정합이 아주 정밀하게 이루어 질 수 있다. 이와 함께 정합된 영상으로부터 얻어진 지상점은 라이다 데이터 보다 더 높은 밀도를 갖게 된다. 따라서 DSM 생성을 위한 격자에 라이다 데이터와 영상정합의 결과로 얻어진 지상점 모두를 내삽에 이용하여 DSM을 생성하고자 한다.

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Design of Single Power CMOS Beta Ray Sensor Reducing Capacitive Coupling Noise (커패시터 커플링 노이즈를 줄인 단일 전원 CMOS 베타선 센서 회로 설계)

  • Jin, HongZhou;Cha, JinSol;Hwang, ChangYoon;Lee, DongHyeon;Salman, R.M.;Park, Kyunghwan;Kim, Jongbum;Ha, PanBong;Kim, YoungHee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.14 no.4
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    • pp.338-347
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    • 2021
  • In this paper, the beta-ray sensor circuit used in the true random number generator was designed using DB HiTek's 0.18㎛ CMOS process. The CSA circuit proposed a circuit having a function of selecting a PMOS feedback resistor and an NMOS feedback resistor, and a function of selecting a feedback capacitor of 50fF and 100fF. And for the pulse shaper circuit, a CR-RC2 pulse shaper circuit using a non-inverting amplifier was used. Since the OPAMP circuit used in this paper uses single power instead of dual power, we proposed a circuit in which the resistor of the CR circuit and one node of the capacitor of the RC circuit are connected to VCOM instead of GND. And since the output signal of the pulse shaper does not increase monotonically, even if the output signal of the comparator circuit generates multiple consecutive pulses, the monostable multivibrator circuit is used to prevent signal distortion. In addition, the CSA input terminal, VIN, and the beta-ray sensor output terminal are placed on the top and bottom of the silicon chip to reduce capacitive coupling noise between PCB traces.

Design of a Clock and Data Recovery Circuit Using the Multi-point Phase Detector (다중점 위상검출기를 이용한 클럭 및 데이터 복원회로 설계)

  • Yoo, Sun-Geon;Kim, Seok-Man;Kim, Doo-Hwan;Cho, Kyoung-Rok
    • The Journal of the Korea Contents Association
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    • v.10 no.2
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    • pp.72-80
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    • 2010
  • The 1Gbps clock and data recovery (CDR) circuit using the proposed multi-point phase detector (PD) is presented. The proposed phase detector generates up/down signals comparing 3-point that is data transition point and clock rising/falling edge. The conventional PD uses the pulse width modulation (PWM) that controls the voltage controlled oscillator (VCO) using the width of a pulse period's multiple. However, the proposed PD uses the pulse number modulation (PNM) that regulates the VCO with the number of half clock cycle pulse. Therefore the proposed PD can controls VCO preciously and reduces the jitter. The CDR circuit is tested using 1Gbps $2^{31}-1$ pseudo random bit sequence (PRBS) input data. The designed CDR circuit shows that is capable of recovering clock and data at rates of 1Gbps. The recovered clock jitter is 7.36ps at 1GHz and the total power consumption is about 12mW. The proposed circuit is implemented using a 0.18um CMOS process under 1.8V supply.

Geometric Modeling and Data Simulation of an Airborne LIDAR System (항공라이다시스템의 기하모델링 및 데이터 시뮬레이션)

  • Kim, Seong-Joon;Min, Seong-Hong;Lee, Im-Pyeong;Choi, Kyung-Ah
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.26 no.3
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    • pp.311-320
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    • 2008
  • A LIDAR can rapidly generate 3D points by densely sampling the surfaces of targets using laser pulses, which has been efficiently utilized to reconstruct 3D models of the targets automatically. Due to this advantage, LIDARs are increasingly applied to the fields of Defense and Security, for examples, being employed to intelligently guided missiles and manned/unmanned reconnaissance planes. For the prior verification of the LIDAR applicability, this study aims at generating simulated LIDAR data. Here, we derived the sensor equation by modelling the geometric relationships between the LIDAR sub-modules, such as GPS, IMU, LS and the systematic errors associated with them. Based on this equation, we developed a program to generate simulated data with the system parameters, the systematic errors, the flight trajectories and attitudes, and the reference terrain model given. This program had been applied to generating simulated LIDAR data for urban areas. By analyzing these simulated data, we verified the accuracy and usefulness of the simulation. The simulator developed in this study will provide economically various test data required for the development of application algorithms and contribute to the optimal establishment of the flight and system parameters.