• Title/Summary/Keyword: 패리티비트

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A Novel Error Detection Algorithm Based on the Structural Pattern of LZ78-Compression Data (LZ78 압축 데이터의 구조적 패턴에 기반한 새로운 오류 검출 알고리즘)

  • Gong, Myongsik;Kwon, Beom;Kim, Jinwoo;Lee, Sanghoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.11
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    • pp.1356-1363
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    • 2016
  • In this paper, we propose a novel error detection algorithm for LZ78-compressed data. The conventional error detection method adds a certain number of parity bits in transmission, and the receiver checks the number of bits representing '1' to detect the errors. These conventional methods use additional bits resulting in increased redundancy in the compressed data which results in reduced effectiveness of the final compressed data. In this paper, we propose error detection algorithm using the structural properties of LZ78 compression without using additional bits in the compressed data. The simulation results show that the error detection ratio of the proposed algorithm is about 1.3 times better for error detection than conventional algorithms.

Distributed Video Coding based on Adaptive Block Quantization Using Received Motion Vectors (수신된 움직임 벡터를 이용한 적응적 블록 양자화 기반 분산 비디오 코딩 방법)

  • Min, Kyung-Yeon;Park, Sea-Nae;Nam, Jung-Hak;Sim, Dong-Gyu;Kim, Sang-Hyo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.2C
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    • pp.172-181
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    • 2010
  • In this paper, we propose an adaptive block quantization method. The propose method perfrect reconstructs side information without high complexity in the encoder side, as transmitting motion vectors from a decoder to an encoder side. Also, at the encoder side, residual signals between reconstructed side information and original frame are adaptively quantized to minimize parity bits to be transmitted to the decoder. The proposed method can effectively allocate bits based on bit error rate of side information. Also, we can achieved bit-saving by transmission of parity bits based on the error correction ability of the LDPC channel decoder, because we can know bit error rate and positions of error bit in encoder side. Experimental results show that the proposed algorithm achieves bit-saving by around 66% and delay of feedback channel, compared with the convntional algorithm.

A Fast Error Concealment Using a Data Hiding Technique and a Robust Error Resilience for Video (데이터 숨김과 오류 내성 기법을 이용한 빠른 비디오 오류 은닉)

  • Kim, Jin-Ok
    • The KIPS Transactions:PartB
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    • v.10B no.2
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    • pp.143-150
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    • 2003
  • Error concealment plays an important role in combating transmission errors. Methods of error concealment which produce better quality are generally of higher complexity, thus making some of the more sophisticated algorithms is not suitable for real-time applications. In this paper, we develop temporal and spatial error resilient video encoding and data hiding approach to facilitate the error concealment at the decoder. Block interleaving scheme is introduced to isolate erroneous blocks caused by packet losses for spatial area of error resilience. For temporal area of error resilience, data hiding is applied to the transmission of parity bits to protect motion vectors. To do error concealment quickly, a set of edge features extracted from a block is embedded imperceptibly using data hiding into the host media and transmitted to decoder. If some part of the media data is damaged during transmission, the embedded features are used for concealment of lost data at decoder. This method decreases a complexity of error concealment by reducing the estimation process of lost data from neighbor blocks. The proposed data hiding method of parity bits and block features is not influence much to the complexity of standard encoder. Experimental results show that proposed method conceals properly and effectively burst errors occurred on transmission channel like Internet.

The Elementary Students' Understanding of Computer Science Through The Computer Science Show Program (컴퓨터과학 쇼를 통한 초등학생의 정보교육에 대한 인식변화)

  • Han, Byoungrae
    • Journal of The Korean Association of Information Education
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    • v.21 no.2
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    • pp.209-217
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    • 2017
  • Recently SW education has been emphasized in Korea, but many students do not have many opportunities to learn computer science. In this paper, I organized a computer science show to enhance interest and understanding of computer science. The computer science show consisted of understanding binary systems, send a text message, parity bit magic, finding a number card, and collecting colors (orange games). I applied the computer science show to elementary school students and looked at the results. Most of the students who participated in computer science shows did not have an "participation experience of computer science shows". As result of surveys, many students answered "I am interesting about computer science shows," "I am interested in computer science," and "I would recommend it to my friends nearby." Through research, I learned that computer science shows are a way for elementary students to draw interest in computer science and to create curiosity and interest in computer science. I found from research that computer science shows are a way to reduce students' learning burdens and to increase interest in computer science.

A Combining Scheme for Partial Incremental Redundancy based Hybrid Automatic Repeat Request in MIMO Systems (다중 안테나 시스템에서 부분 증분 리던던시 방식 Hybrid ARQ를 위한 결합 기법)

  • Park, Sang-Joon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.47 no.11
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    • pp.19-23
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    • 2010
  • In this paper, we propose a combining scheme for partial IR based hybrid ARQ in MIMO systems. The proposed combining scheme is a symbol-level combining scheme for repeatedly transmitted systematic symbols in partial IR based hybrid ARQ. In this paper, it is shown that the proposed combining scheme can also enhance the detection performance of the parity symbols that are newly transmitted in each retransmission. Simulation results show that the proposed combining scheme significantly improves the performance of the partial IR based hybrid ARQ compared to the cases of the conventional bit-level combining scheme, especially with the ZF detection.

Bit Split Method for Efficient Channel Estimation in UWA Channel (수중 다중경로 채널에서 효과적인 채널추정을 위한 비트 분리 방법)

  • Kim, Min-Hyuk;Park, Tae-Doo;Kim, Chul-Seung;Jung, Ji-Won;Yong, Chun-Seung;Sohn, Kwon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.10
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    • pp.2207-2214
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    • 2010
  • Underwater acoustic(UWA) communication has multipath error because of reflection by sea-level and sea-bottom. The multipath of UWA channel causes signal distortion and error floor. In this paper, we proposed split input bits of channel decoder using method of maximum value, average value, LLR value for optimal estimation. Channel coding method is LDPC(N size=16000) standard in DVB-S2. As shown in simulation results, the performance of LLR value method is better than other methods.

Low Complexity Iterative Detection and Decoding using an Adaptive Early Termination Scheme in MIMO system (다중 안테나 시스템에서 적응적 조기 종료를 이용한 낮은 복잡도 반복 검출 및 복호기)

  • Joung, Hyun-Sung;Choi, Kyung-Jun;Kim, Kyung-Jun;Kim, Kwang-Soon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.8C
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    • pp.522-528
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    • 2011
  • The iterative detection and decoding (IDD) has been shown to dramatically improve the bit error rate (BER) performance of the multiple-input multiple-output (MIMO) communication systems. However, these techniques require a high computational complexity since it is required to compute the soft decisions for each bit. In this paper, we show IDD comprised of sphere decoder with low-density parity check (LDPC) codes and present the tree search strategy, called a layer symbol search (LSS), to obtain soft decisions with a low computational complexity. In addition, an adaptive early termination is proposed to reduce the computational complexity during an iteration between an inner sphere decoder and an outer LDPC decoder. It is shown that the proposed approach can achieve the performance similar to an existing algorithm with 70% lower computational complexity compared to the conventional algorithms.

Fast Distributed Video Decoding Using BER model for Applications with Motion Information Feedback (움직임 정보 피드백이 가능한 응용을 위한 BER모델을 이용한 고속 분산 비디오 복호화 기법)

  • Kim, Man-Jae;Kim, Jin-Soo
    • The Journal of the Korea Contents Association
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    • v.12 no.12
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    • pp.14-24
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    • 2012
  • DVC (Distributed Video Coding) techniques need feedback channel for parity bit control to achieve the good RD performances, however, this causes the DVC system to have high decoding latency. In order to implement in real time environments and to accelerate commercializations, many research works have been focusing on the development of fast video decoding algorithm. As one of the real time implementations, this paper deals with a novel DVC scheme suitable for some application areas where source statistics such as motion information can be provided to the encoder side from the decoder side. That is, this paper propose a fast distributed video decoding scheme to improve the decoding speed by using the feedback of motion information derived in SI generation. Through computer simulations, it is shown that the proposed method outperforms the conventional fast DVC decoding schemes.

Channel Estimation for Block-Based Distributed Video Coding (블록 기반의 분산 비디오 코딩을 위한 채널 예측 기법)

  • Min, Kyung-Yeon;Park, Sea-Nae;Yoo, Sung-Eun;Sim, Dong-Gyu;Jeon, Byeung-Woo
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.48 no.2
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    • pp.53-64
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    • 2011
  • In this paper, we propose a channel estimation of side information method based received motion vectors for distributed video coding. The proposed decoder estimates motion vectors of side information and transmits it to the encoder. As the proposed encoder generates side information which is the same to one in the decoder with received motion vectors, accuracy of side information of the decoder is assessed and it is transmitted to decoder. The proposed decoder can also estimate accurate crossover probability with received error information. As the proposed method conducts correct belief propagation, computational complexity of the channel decoder decreases and error correction capability is significantly improved with the smaller amount of parity bits. Experimental results show that the proposed algorithm is better in rate-distortion performance and it is faster than several conventional distributed video coding methods.

A new design method of m-bit parallel BCH encoder (m-비트 병렬 BCH 인코더의 새로운 설계 방법)

  • Lee, June;Woo, Choong-Chae
    • Journal of the Institute of Convergence Signal Processing
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    • v.11 no.3
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    • pp.244-249
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    • 2010
  • The design of error correction code with low complexity has a good attraction for next generation multi-level cell flash memory. Sharing sub-expressions is effective method to reduce complexity and chip size. This paper proposes a new design method of m-bit parallel BCH encoder based on serial linear feedback shift register structure with low complexity using sub-expression. In addition, general algorithm for obtaining the sub-expression is introduced. The sub-expression can be expressed by matrix operation between sub-matrix of generator matrix and sum of two different variables. The number of the sub-expression is restricted by. The obtained sub-expressions can be shared for implementation of different m-parallel BCH encoder. This paper is not focused on solving a problem (delay) induced by numerous fan-out, but complexity reduction, expecially the number of gates.