• Title/Summary/Keyword: 파이프라인 안정성

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A Study On the Design of a Floating Point Unit for MPEG-2 AAC Decoder (MPEG-2 AAC 복호기를 위한 부동소수점유닛 설계에 관한 연구)

  • 구대성;김필중;김종빈
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.4
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    • pp.355-355
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    • 2002
  • In this paper, we designed a FPU(floating point unit) that it is very important and requires of high density when digital audio is designed. Almost audio system must support the multi-channel and required for high quality. A floating point arithmetic function in MPEG-2 AAC that implemented by hardware is able to realtime decoding when DSP realization. The reason is that MPEG-2 AAC is compatible to the Audio field of MPEG-4 and afterwards. We designed a FPU by hardware to increase the speed of a floating point unit with much calculation part in the MPEG-2 AAC Decoder. A FPU is composed of a multiplier and an adder. A multiplier used the Radix-4 Booth algorithm and an adder adopted 1's complement method for speed up. A form of a floating point unit has 8bit of exponent part and 24bit of mantissa. It's compatible with the IEEE single precision format and adopted a pipeline architecture to increase the speed of a processor. All of sub blocks are based on ISO/IEC 13818-7 standard. The algorithm is tested by C language and the design does by use of VHDL(VHSIC Hardware Description Language). The maximum operation speed is 23.2MHz and the stable operation speed is 19MHz.

A practial design of direct digital frequency synthesizer with multi-ROM configuration (병렬 구조의 직접 디지털 주파수 합성기의 설계)

  • 이종선;김대용;유영갑
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.12
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    • pp.3235-3245
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    • 1996
  • A DDFS(Direct Digital Frequency Synthesizer) used in spread spectrum communication systems must need fast switching speed, high resolution(the step size of the synthesizer), small size and low power. The chip has been designed with four parallel sine look-up table to achieve four times throughput of a single DDFS. To achieve a high processing speed DDFS chip, a 24-bit pipelined CMOS technique has been applied to the phase accumulator design. To reduce the size of the ROM, each sine ROM of the DDFS is stored 0-.pi./2 sine wave data by taking advantage of the fact that only one quadrant of the sine needs to be stored, since the sine the sine has symmetric property. And the 8 bit of phase accumulator's output are used as ROM addresses, and the 2 MSBs control the quadrants to synthesis the sine wave. To compensate the spectrum purity ty phase truncation, the DDFS use a noise shaper that structure like a phase accumlator. The system input clock is divided clock, 1/2*clock, and 1/4*clock. and the system use a low frequency(1/4*clock) except MUX block, so reduce the power consumption. A 107MHz DDFS(Direct Digital Frequency Synthesizer) implemented using 0.8.mu.m CMOS gate array technologies is presented. The synthesizer covers a bandwidth from DC to 26.5MHz in steps of 1.48Hz with a switching speed of 0.5.mu.s and a turing latency of 55 clock cycles. The DDFS synthesizes 10 bit sine waveforms with a spectral purity of -65dBc. Power consumption is 276.5mW at 40MHz and 5V.

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Study on the structure of the articulation jack and skin plate of the sharp curve section shield TBM in numerical analysis (수치해석을 통한 급곡선 구간 Shield TBM의 중절잭 및 스킨플레이트 구조에 관한 연구)

  • Kang, Sin-Hyun;Kim, Dong-Ho;Kim, Hun-Tae;Song, Seung-Woo
    • Journal of Korean Tunnelling and Underground Space Association
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    • v.19 no.3
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    • pp.421-435
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    • 2017
  • Recently, due to the saturation of ground structures and the overpopulation of pipeline facilities requires to development of underground structures as an alternative to ground structures. Thus, mechanized tunnel construction of the shield TBM method has been increasing in order to prevent vibration and noise problems in construction of the NATM tunnel for the urban infrastructure construction. Tunnel construction plan for the tunnel line should be formed in a sharp curve to avoid building foundation and underground structures and it is inevitable to develop a shield TBM technology that suits the sharp curve tunnel construction. Therefore, this study is about the structural stability technology of the articulation jack, shield jack and skin plate for the shield TBM thrust in case of the mechanized tunnel construction that is a straight and sharp curve line. The construction case study and shield TBM operation principle are examined and analyzed by the theoretical approach. The torque of the cutter head, the thrust of the articulation jack and the shield jack, the amount of over cutting for curve is important respectively in shield TBM construction of straight and sharp curve line. In addition, it is very important to secure the stability of the skin plate structure to ensure the safety of the inside worker. This study examines the general structure and construction of the equipment, experimental simulation was carried out through numerical analysis to examine the main factors and structural stability of the skin plate structure. The structural stability of the skin plate was evaluated and optimizes the shape by comparing the loads of the articulation jack by selecting the virtual soil to be applied in a straight and sharp curve line construction. Since the present structure and operation method of the shield TBM type in domestic constructions are very similar, this study will help to develop the localized shield TBM technology for the new equipment and the vulnerability and stability review.

The Latest Progress on the Development of Technologies for $CO_2$ Storage in Marine Geological Structure and its Application in Republic of Korea (해저 지질구조내 $CO_2$ 저장기술의 연구개발 동향 및 향후 국내 실용화 방안)

  • Kang, Seong-Gil;Huh, Cheol
    • Journal of the Korean Society for Marine Environment & Energy
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    • v.11 no.1
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    • pp.24-34
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    • 2008
  • To mitigate the climate change and global warming, various technologies have been internationally proposed for reducing greenhouse gas emissions. Especially, in recent, carbon dioxide capture and storage (CCS) technology is regarded as one of the most promising emission reduction options that $CO_2$ be captured from major point sources (eg., power plant) and transported for storage into the marine geological structure such as deep sea saline aquifer. The purpose of this paper is to review the latest progress on the development of technologies for $CO_2$ storage in marine geological structure and its perspective in republic of Korea. To develop the technologies for $CO_2$ storage in marine geological structure, we carried out relevant R&D project, which cover the initial survey of potentially suitable marine geological structure fur $CO_2$ storage site and monitoring of the stored $CO_2$ behavior, basic design for $CO_2$ transport and storage process including onshore/offshore plant and assessment of potential environmental risk related to $CO_2$ storage in geological structure in republic of Korea. By using the results of the present researches, we can contribute to understanding not only how commercial scale (about 1 $MtCO_2$) deployment of $CO_2$ storage in the marine geological structure of East Sea, Korea, is realized but also how more reliable and safe CCS is achieved. The present study also suggests that it is possible to reduce environmental cost (about 2 trillion Won per year) with developed technology for $CO_2$ storage in marine geological structure until 2050.

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A 0.31pJ/conv-step 13b 100MS/s 0.13um CMOS ADC for 3G Communication Systems (3G 통신 시스템 응용을 위한 0.31pJ/conv-step의 13비트 100MS/s 0.13um CMOS A/D 변환기)

  • Lee, Dong-Suk;Lee, Myung-Hwan;Kwon, Yi-Gi;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.3
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    • pp.75-85
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    • 2009
  • This work proposes a 13b 100MS/s 0.13um CMOS ADC for 3G communication systems such as two-carrier W-CDMA applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs a four-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. Area-efficient high-speed high-resolution gate-bootstrapping circuits are implemented at the sampling switches of the input SHA to maintain signal linearity over the Nyquist rate even at a 1.0V supply operation. The cascode compensation technique on a low-impedance path implemented in the two-stage amplifiers of the SHA and MDAC simultaneously achieves the required operation speed and phase margin with more reduced power consumption than the Miller compensation technique. Low-glitch dynamic latches in sub-ranging flash ADCs reduce kickback-noise referred to the differential input stage of the comparator by isolating the input stage from output nodes to improve system accuracy. The proposed low-noise current and voltage references based on triple negative T.C. circuits are employed on chip with optional off-chip reference voltages. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.70LSB and 1.79LSB, respectively. The ADC shows a maximum SNDR of 64.5dB and a maximum SFDR of 78.0dB at 100MS/s, respectively. The ABC with an active die area of $1.22mm^2$ consumes 42.0mW at 100MS/s and a 1.2V supply, corresponding to a FOM of 0.31pJ/conv-step.

An Analysis of the Managerial Level's Gender Gap and "Glass Ceiling" of the Corporation (기업 관리직의 젠더 격차와 "유리천장" 분석)

  • Cho, Heawon;Hahm, Inhee
    • 한국사회정책
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    • v.23 no.2
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    • pp.49-81
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    • 2016
  • This study agrees with the idea that a situation centered perspective provides a useful contribution in understanding women's attitude on organizations. Women's occupational experiences are less related to their "femaleness" than to the structural constraints inherent in the occupational positions women fill. So characteristics of the organizational situation including gender composition and hierarchical status may "shape and define" women's experience on the job. The present study examined the managerial level's gender gap and "glass ceiling" of the corporation. According to Kanter, if the ratio of women to men in organizations begins to shift, as affirmative action and new hiring and promotion policies promised, forms of relationships and corporate culture should also change. However, the mere presence of women on workplace may not, in itself, result in women-friendly work condition. This study analyzes "Korean Women Manger Panel survey(2010 3rd. wave)" to examine how much gender gap of the managerial level persists and when the glass ceiling effect emerges. Using t-test and ANOVA, various aspects of the gender gap within managerial level were verified. The most significant finding is the glass ceiling effect starts from very low level of management. Policy implications from the statistical analysis of the Panel survey are: 1) We need to increase the absolute number of the women managers for securing middle level women leadership pipe line. 2) We need to confront the fact that the glass ceiling starts from the very low managerial level, and to explore more realistic way to break up the vicious circle for the tokenism. and 3) We need to looking beyond numbers in approaching women's matter at work. At the cultural and institutional level, work-family programs and policies, women's ratings of their competence, and family-friendly organization's climate should be considered.