• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.1
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• pp.18-25
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• 2018

In this paper, we present a low-power implementation of the multi-channel hearing aid system using a general-purpose DSP chip. The system includes an acoustic amplification algorithm based on Wide Dynamic Range Compression (WDRC), an adaptive howling canceller, and a single-channel noise reduction algorithm. To achieve a low-power implementation, each algorithm is re-constructed in forms of integer program, and the integer program is converted to the assembly program using BelaSigna(R) 250 instructions. Through experiments using the implementation system, the performance of each processing algorithm was confirmed in real-time. Also, the clock of the implementation system was measured, and it was confirmed that the entire signal processing blocks can be performed in real time at about 7.02MHz system clock.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.9
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• pp.1884-1891
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• 2012

In this paper, we design the sliding correlator SS transceiver which supports short message service. We also analyze the PN code acquisition circuit that is essential for spread spectrum receiver. Using Maxplus II tool provided by altera Co., Ltd, we have designed PN code generator, and sliding correlator for PN code acquisition. Then, they have been made into FPGA by way of EPM7064SLC44-10 - a chip of Altera Co., Ltd. Additionally, we have designed delay clock circuit which is faster than the clock of Tx PN clock, designed switching circuit to control the clock rate and data demodulation circuit. The performance of the transceiver is evaluated from the experimental results. Especially, the performance of PN code acquisition accomplished by sliding correlator which is very important to evaluate spread spectrum receiver is evaluated with the comparison of the lock states.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.951-962
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• 2002

A DMT transceiver recovers the sampling time from reserved sub-carriers, the pilots. Since the pilots are available after the FFT, the symbol synchronization must be done before sample synchronization. In DMT VDSL system, symbol synchronization is handled separately from sample synchronization, although the two processes are intimately related. The DMT symbol itself contains sufficient information, the cyclic extension, for symbol synchronization. Using only the sign bit of received signal, the Maximum Likelihood Estimation solution is derived. The Tx windowing in the transmitter of DMT VDSL system results in the blurring of MLE peaks. We propose the weighted summing MLE method using the sign bit which produces the clearly sharp top of MLE peaks. The stability of symbol synchronization is improved significantly by averaging over a few symbols. This paper presents the study of the original MLE and the weighted summing MLE using sign bit. A clock difference between transmitter and receiver destroys the oahogonality of the carriers. Therefore, a receiver using asynchronous sampling must perform timing correction in the discrete-time domain. We introduce an efficient digital sample synchronization method which is based on temporal and frequency domain digital signal processing.

• The KIPS Transactions:PartC
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• v.16C no.2
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• pp.229-236
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• 2009

UWB signal with high resolution capability can be used to estimate ranging and positioning in wireless personal area networks. The clock frequency differences of nodes have serious affects on asynchronous ranging methods to estimate locations of mobile nodes. The specification of high rate UWB describes successive TWR method with the estimation of a relative clock frequency offset. In this paper, we complete the ranging equations using relative frequency offset and time information, and propose a method to estimate the exact frequency offsets. We evaluate the ranging algorithms with simulation. The results show that the performances of the algorithms using frequency offsets are very close without noise. But, at noise environment, the method of exact frequency offsets shows better performance than that of relative frequency offsets.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.10
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• pp.914-924
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• 1991

It has been generally used for PLL(Phase Locked Loop) to be synthesized randomly chosen frequency state, but the PLL locking time was inevitable element. A direct digital synthesizer. Which makes output frequency directly in sine wave by a phase accumulating method, could be leiminate the defect, although a phase distortion in frequency spectrum. In order to improve this disadvantage, the phase accumulating method is reconsidered in the side of he output wave formula expression. A new mechanism is proposed, and it is constructed by a most suitable logic elements. The spectrum of synthesized sine waveform is simulated and compared with a measured value, and it’s the coherence frequency hoppong state with the PN(Pseudo Noise) code sequence is confirmed. In this results, the power levels of phase distortion harmonics are decreased to 10~25dB and bandwidths are increased to 420kHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.11
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• pp.1190-1196
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• 2014

This paper presents the design of a Frequency Modulated Continuous Wave(FMCW) radar altimeter with wide altitude range and low measurement errors. Wide altitude range is achieved by employing the optic delay in the transmitting path to reduce the dynamic range of measuring altitude. Transmitting power and receiver gain are also controlled to have the dynamic range of the received power be reduced. In addition, low measurement errors are obtained by improving the sweep linearity using the Direct Digital Synthesizer(DDS) and minimizing the phase noise employing the reference clock(Ref_CLK) as the offset frequency of the Phase Locked Loop(PLL).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1506-1511
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• 2004

The error control of digital transmission system is a very important subject because of the noise effects, which is very sensitive to transmission performance of the digital communication system It employs a modified Euclid's algorithm to compute the error-location polynomial and error-magnitude polynomial of input data. The circuit size is reduced by selecting the Modified Euclid's Algorithm with one Euclid Cell of mutual operation. And the operation speed of Decoder is improved by using ROM and parallel structure. The proposed Encoder and Decoder are simulated with ModelSim and Active-HDL and synthesized with Synopsys. We can see that this chip is implemented on Xilinx Virtex2 XC2V3000. A share of slice is 28%. nut speed of this paper is 45Mhz.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.5
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• pp.93-101
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• 2008

Side channel attacks are well known as one of the most powerful physical attacks against low-power cryptographic devices and do not take into account of the target's theoretical security. As an important succeeding factor in side channel attacks (specifically in DPAs), exact time-axis alignment methods are used to overcome misalignments caused by trigger jittering, noise and even some countermeasures intentionally applied to defend against side channel attacks such as random clock generation. However, the currently existing alignment methods consider only on the position of signals on time-axis, which is ineffective for certain countermeasures based on time-axis misalignments. This paper proposes a new signal alignment method based on interpolation and decimation techniques. Our proposal can align the size as well as the signals' position on time-axis. The validity of our proposed method is then evaluated experimentally with a smart card chip, and the results demonstrated that the proposed method is more efficient than the existing alignment methods.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.16 no.6
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• pp.454-464
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• 2023

This paper proposes a low-power 8-bit asynchronous SAR ADC with a sampling rate of 1 MS/s for sensor node applications. The ADC uses bootstrapped switches to improve linearity and applies a VCM-based CDAC switching technique to reduce the power consumption and area of the DAC. Conventional synchronous SAR ADCs that operate in synchronization with an external clock suffer from high power consumption due to the use of a clock faster than the sampling rate, which can be overcome by using an asynchronous SAR ADC structure that handles internal comparisons in an asynchronous manner. In addition, the SAR logic is designed using dynamic logic circuits to reduce the large digital power consumption that occurs in low resolution ADC designs. The proposed ADC was simulated in a 180-nm CMOS process, and at a 1.8 V supply voltage and a sampling rate of 1 MS/s, it consumed 46.06 𝜇W of power, achieved an SNDR of 49.76 dB and an ENOB of 7.9738 bits, and obtained a FoM of 183.2 fJ/conv-step. The simulated DNL and INL are +0.186/-0.157 LSB and +0.111/-0.169 LSB.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.1
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• pp.9-18
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• 2008

Recently according to the development of an information society the information technology equipments which a clock frequency has the facility over a number giga hertz have been developed much. And we have research which leakage electromagnetic signals can use at the communication security and tapping. In this paper, we restored leakage electromagnetic signals of the monitors. And we proposed efficient recovery technique to restore the screen of the monitor. First of all, we understand a screen characteristic of the monitor. And then we restored a monitor screen from leakage electromagnetic signals from the monitor. For also we tried to use a Wavelet transform and filters to remove the noise for better performance. In the result of the experiment, we used leakage electromagnetic signals and confirmed the possibility of a monitor screen of the recovery. And we improve the performance with Wavelet transform and filters.