• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.202-202
• /
• 2008

실리콘 기판 위에 성장된 세륨 산화막(CeO2)은 고품질의 SOI(Silicon on Insulator)나 혹은 안정한 캐패시터 소자와 같은 반도체 소자에 대한 응용 가능성이 높아 여러 연구가 진행되어 왔다. 세륨 산화막은 형석 구조, 다시 말해서 대칭적인 큐빅 구조이며 화학적으로 안정한 물질이다. 또한, 세륨 산화막의 격자상수 (a = $5.411\AA$)는 실리콘의 격자상수 (a = $5.430\AA$) 와 비슷하며 큰 밴드갭(6eV) 및 높은 유전상수 ($\varepsilon$ = 26), 높은 열적 안전성을 지니고 있어 실리콘 기판에 사용된 기존 절연막인 사파이어나 질코늄 산화막보다 우수한 특성을 지니고 있다. 본 논문에서는 스퍼터링을 이용하여 세륨 산화막을 실리콘 기판 위에 형성하면서 기판가열 온도 조건을 각각 상온, $100^{\circ}C$, $200^{\circ}C$로 설정하였으며, 세륨 산화막의 증착 두께 조건을 각각 80nm, 120nm로 설정한 다음 퍼니스를 이용하여 $1100^{\circ}C$에서 1시간 동안 열처리를 거친 세륨 산화막의 결정화 형태 및 박막의 막질 상태를 각각 X선 회절 장치 (XRD) 및 주사전자현미경 (SEM)으로 관찰하였다.

• Proceedings of the KIPE Conference
• /
• 2005.07a
• /
• pp.445-448
• /
• 2005

A new high efficiency phase shifted full bridge (PSFB) converter for sustaining power module of plasma display panel (PDP) is proposed in this paper .The proposed converter employs the rectifier of voltage doubler type without output inductor. Since it has no output inductor, the voltage stresses of the secondary rectifier diodes can be clamped at the level of the output voltage. Therefore, no dissipative resistor-capacitor (RC) snubber for rectifier diodes is needed and a high efficiency as well as low noise cutout voltage can be realized. In addition, due to elimination of the large output inductor, it features a simple structure, lower cost, less mass, and lighter weight. Furthermore, the proposed converter has wide zero voltage switching (ZVS ) ranges with low current stresses of the primary switches. Also the resonance between the leakage inductor of the transformer and the capacitor of the voltage doubler cell makes the current stresses of the primary switches and rectifier diodes reduced. In this paper, the operational principles, analysis of the proposed converter, and the experimental results are presented.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.14 no.3
• /
• pp.220-227
• /
• 2009

A self oscillation DC/DC converter which has a very desirable characteristics of the high input-output voltage conversion ratio for high voltage DC power supply applications is proposed in this paper. The proposed converter is composed of one power switch, one inductor, several capacitors and diodes. Compared with conventional high-voltage DC/DC converters, it performs the high- voltage power conversion using the inductor instead of the bulky step-up transformer. Therefore, it can reduce the size of magnetic device and save the cost. Moreover, since it needs no control IC by using self oscillation circuit and has lower voltage stress on output diodes, it features a lower cost, simpler structure and more improved performance. Finally, a comparative analysis and experimental results are presented to show the validity of the proposed converter.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.3
• /
• pp.195-201
• /
• 2003

The (Ba,Bi,Sr)TiO$_3$[BBST] thin films were fabricated on Pt/Ti/SiO$_2$ /Si substrate by RF sputtering method. The effects of Ar/O$_2$ ratio on the structural and dielectric properties of BBST thin films were investigated. Increasing the Ar/O$_2$ ratio, the intensity of BaBi$_4$Ti$_4$O$_{15}$ and Bi$_4$Ti$_3$O$_{12}$ peaks were increased but (Ba$_{0.5}$Sr$_{0.5}$)TiO$_3$ peak was decreased. In the BBST thin films deposited with condition of Ar/O$_2$(90/10) ratio, the composition ratio of the Ba, Bi and Sr atoms were 0.35, 0.25 and 0.4 respectively. The Bi and Ti atoms were diffused into the Pt layers. Increasing the Ar/O$_2$ ratio, the dielectric constant of the BBST thin films were increased but the dielectric loss of the BBST thin films were decreased. The dielectric constant and dielectric loss of the BBST deposited at 90/10 of Ar/O$_2$ ratio were 319 and 2.2%. respectively . Increasing the applied voltage, the capacitance of the BBST thin films were decreased.reased.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.7 s.361
• /
• pp.54-61
• /
• 2007

A variable gain low noise amplifier (VG-LNA) implemented in TSMC 0.18 um process is presented. This VG-LNA is designed of two stage amplifier, and its gain is controlled by the shunt feedback loop composed of a gain control transistor (GCT) and a coupling capacitor in second stage. The channel resistance of GCT in the shunt feedback loop influences the input and output stages of a second stage by the Miller effect. Total gain of the proposed VG-LNA is changed by two factors, the load impedance reduction and the interstage mismatch by controlling the channel resistance of the GCT. Consequently, by adding a shunt feedback with a gain control transistor, this proposed VG-LNA achieves both wide gain tuning range of 37 dB and continuous gain control simultaneously.

• Korean Journal of Materials Research
• /
• v.21 no.6
• /
• pp.309-313
• /
• 2011

The power capacitors used as vehicle inverters must have a small size, high capacitance, high voltage, fast response and wide operating temperature. Our thin film capacitor was fabricated by alumina layers as a dielectric material and a metal electrode instead of a liquid electrolyte in an aluminum electrolytic capacitor. We analyzed the micro structures and the electrical properties of the thin film capacitors fabricated by nano-channel alumina and metal electrodes. The metal electrode was filled into the alumina nano-channel by electroless nickel plating with polyethylene glycol and a palladium catalyst. The spherical metals were formed inside the alumina nano pores. The breakdown voltage and leakage current increased by the chemical reaction of the alumina layer and $PdCl_2$ solution. The thickness of the electroless plated nickel layer was 300 nm. We observed the nano pores in the interface between the alumina layer and the metal electrode. The alumina capacitors with nickel electrodes had a capacitance density of 100 $nF/cm^2$, dielectric loss of 0.01, breakdown voltage of 0.7MV/cm and leakage current of $10^4{\mu}A$.

• Elastomers and Composites
• /
• v.47 no.4
• /
• pp.292-296
• /
• 2012

An electric double-layer capacitor (ELDC) of activated carbon electrode is prepared using a proton-conducting hydrogel polymer electrolyte, which is composed of poly(vinyl alcohol), silicotungstic acid, $H_3PO_4$, and deionized water. A solid film by evaporating the hydrogel polymer electrolyte is also prepared for comparison. The hydrogel polymer electrolyte also acts as a separator with the thickness of about $80{\mu}m$ and the room-temperature ionic conductivity of $10^{-2}S\;cm^{-1}$. The EDLC containing the symmetric electrodes of activated carbon shows the specific capacitance of $58F\;g^{-1}$ at $100mV\;s^{-1}$ with a good cycle life, implying that the hydrogel polymer electrolyte is very promising for use in EDLCs.

• Proceedings of the Korean Vacuum Society Conference
• /
• 1999.07a
• /
• pp.152-152
• /
• 1999

1Gb급 이상 기억소자의 캐패시터 재료로 주목받고 있는 (Ba,Sr)TiO3 [BST] 박막의 전극재료로는 Pt, Ru, Ir과 같은 금속전극과 RuO2, IrO2와 산화물 전도체가 유망한 것으로 알려져 있다. 그런데, DRAM의 집적도가 증가하게 되면, BST같은 고유전율 박막을 유전재료로 사용한다 하더라도, 3차원적인 구조가 불가피하게 때문에 기존의 sputtering 방법으로는 우수한 단차피복성을 얻기 힘들므로, MOCVD법이 필수적이다. 본 연구에서는 기존에 연구되었던 Pt에 비해 식각특성이 우수하고, 비교적 낮은 비저항을 갖는 Ru 박막증착에 대한 연구를 행하였다. 본 연구에서는 수직형의 반응기와 저항 가열 방식의 susceptor로 구성된 저압 유기금속 화학증착기를 사용하여 최대 6inch 직경을 갖는 기판 위에 Ru박막을 증착하였다. Precursor로는 기존에 연구된 적이 없는 bis-(ethyo-$\pi$-cyclopentadienyl)Ru (Ru(C5H4C2H5)2, [Ru(EtCp)2])를 사용하였으며, bubbler의 온도는 85$^{\circ}C$로 하였다. Si, SiO2/Si를 사용하였으며, 증착온도 25$0^{\circ}C$~40$0^{\circ}C$, 증착압력 3Torr의 조건에서 Ru 박막을 증착하였다. Presursor를 운반하는 수송기체로는 Ar을 사용하였으며, carbon과 같은 불순물의 제거를 위해 O2를 첨가하였다. 증착된 박막은 XRD, SEM, 4-point probe등을 통해 구조적, 전기적 특성을 평가하였으며, 열역학 계산을 위해서는 SOLGASMIX-PV프로그램을 사용하였다. Ru 박막의 증착에 있어서 산소의 첨가는 필수적이었으며, Ru 박막의 증착속도는 30$0^{\circ}C$~40$0^{\circ}C$의 온도 영역에서 200$\AA$/min으로 일정하였으며, 첨가된 산소의 양이 적을수록 더 치밀하고 평탄한 표면형상을 보였으며, 또한 더 낮은 전기 전도도를 보였다. 그리고 증착된 박막은 12~15$\mu$$\Omega$cm 정도의 낮은 비저항 값을 나타냈으며 이것은 기존의 sputtering 법에 의해 증착된 Ru 박막의 비저항 값들과 비교될만하다. 한편, 높은 온도, 높은 산소분압 조건에서 RuO2의 형성을 관찰하였으며, 이것은 열역학적인 계산을 통해서 잘 설명할 수 있었다.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.26 no.11A
• /
• pp.1812-1819
• /
• 2001

In this paper, it investigated the permitted limit of the analog nonideality for the SOSOC Σ-Δ modulator design which is satisfied with 1 [MHz] signal bandwidth and 12-bit resolution in the OSR=25. Firstly, it get the SOSOC Σ-Δ modulator model and gain coefficient which is suitable in low voltage for the Σ-Δ modulator design which is satisfied with the specification in the supply voltage 3.3 [Vl. And it provided the performance prediction of the Σ-Δ modulator and the permitted limit of the nonideality by adding the performance degradation facts of the Σ-Δ modulator such as the finite gain of the amplifier, the SR, the closed-loop pole, the switch ON resistance and the capacitor mismatch to the ideal Σ-Δ modulator model. When designed the Σ-Δ modulator which is satisfied with the specification by the base above, it will be able to predict the performance of the Σ-Δ modulator and the guide for the specification of the circuit which composes the Σ-Δ modulator.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.11 no.1
• /
• pp.33-40
• /
• 1998

The composite SiO$_2$/Si$_3$N$_4$/SiO$_2$(ONO) film formed by oxidation on nitride film has been widely studied as DRAM stacked capacitor multi-dielectric films. Load lock(L/L) LPCVD system by HF cleaning is used to improve electrical capacitance and to scale down of effective thickness for memory device, but is brings a new problem. Nitride film deposited using HF cleaning shows selective deposition on poly silicon and oxide regions of capacitor. This problem is avoidable by carpeting chemical oxide using $H_2O$$_2$cleaning before nitride deposition. In this paper, we study the limit of nitride thickness for abnormal oxidation and the initial deposition time for nitride deposition dependent on underlayer materials. We proposed an advanced fabrication process for stacked capacitor in order to avoid selective deposition problem and show the usefulness of nitride deposition using L/L LPCVD system by $H_2O$$_2$cleaning. The natural oxide thickness on polysilicon monitor after HF and $H_2O$$_2$cleaning are measured 3~4$\AA$, respectively. Two substrate materials have the different initial nitride deposition times. The initial deposition time for polysilicon is nearly zero, but initial deposition time for oxide is about 60seconds. However the deposition rate is constant after initial deposition time. The limit of nitride thickness for abnormal oxidation under the HF and $H_2O$$_2$cleaning method are 60$\AA$, 48$\AA$, respectively. The results obtained in this study are useful for developing ultra thin nitride fabrication of ONO scaling and for avoiding abnormal oxidation in stacked capacitor application.