• Journal of KIISE:Computer Systems and Theory
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• v.26 no.1
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• pp.64-71
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• 1999

본 논문에서는 공중 광역 ATM망 환경에서 비연결형 서비스 제공에 사용되는 CLS에 적용될 수 있는 홉 카운터를 이용한 우선 순위 제어 알고리즘(Priority Control Algorithm using Hop-Count : HC-PC)의 망 자원 손실 비용을 분석하였다. 분석을 통해 우선 순위가 없을 경우 (No Priority Controls Algorithm: NO-Pc) 의 평균 셀 손실률이 HC-PC 의 평균 셀 손실률의 가중 평균보다 크거나 같은 경우 항상 NO-PC 이 평균 망 자원 손실 비용이 HC-PC 의 평균 망 자원 손실 비용에 비해 크다는 사실을 보였다. 시뮬레이션 결과는 분석에 의해 찾아진 조건이 만족됨을 보여주며 HC-PC가 NO-PC에 비해 어떠한 환경에서든지 항상 낮은 평균 망 자원 손실 비용을 가짐을 보여 준다.

• Transactions of The Korea Fluid Power Systems Society
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• v.6 no.3
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• pp.23-31
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• 2009

Counter shaft transmission is a popular automatic transmission power train in construction vehicles such as wheel loader and forklift. The gear train layout of counter shaft transmission is a very basic and important development stage because it affects the most of components design including hydraulic system and shift control algorithm, etc. This paper presents a design methodology for the gear train layout from the analysis of power flow path and clutch hook-up of the existing counter shaft transmission that is adopted in commercialized construction vehicles. Also, independent constraints for the meshed gear ratios are derived in order to realize forward 4-speed and reverse 3-speed gear ratio. The layout design principle proposed here was applied to the new original counter shaft transmission that is underdevelopment.

• Journal of Drive and Control
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• v.19 no.4
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• pp.10-18
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• 2022

Air-drop hammer press and counterblow hammer press are widely used power-drop forging hammersemploying different forging blow mechanisms. It is important and necessary to analyze mechanical vibrations of these two different hammers in their forging processes in order to develop high performance forging hammers. In this study, these two forging hammers were mathematically modelled as mass-spring-damper systems. For these two different types of forging hammers, the forging efficiency and mechanical vibrations due to hammer forging blow were theoretically analyzed and compared. The force transmitted to the ground was also determined and compared. Especially, effects of mass ratio and restitution coefficient on forging efficiency were investigated.

• Asia Marketing Journal
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• v.1 no.2
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• pp.36-55
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• 1999

서비스 인카운터의 제고는 서비스기업의 마케팅성과에 매우 중요하다. 서비스 인카운터는 서비스기업의 경쟁전략과 서비스전달시스템간의 적합성에 의해 영향을 받는다. 그러므로 서비스기업의 경쟁전략과 서비스전달시스템간의 적합성정도는 서비스기업의 마케팅성과를 높이는데 있어 핵심성공요인이 된다. 본 논문은 금융산업을 대상으로 서비스기업의 경쟁전략, 서비스전달시스템 결정요인, 서비스전달시스템의 유형간의 적합성 여부가 마케팅성과에 미치는 영향에 대해 실증분석을 하였다. 실증분석 결과 서비스기업의 경쟁전략과 서비스전달시스템 결정요인간의 적합도가 높을수록, 그리고 경쟁전략과 서비스전달시스템의 유형간의 적합도가 높을수록 마케팅성과가 높아지는 것으로 나타났다.

• Proceedings of the Korean Radioactive Waste Society Conference
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• 2007.11a
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• pp.313-314
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• 2007

• KIPS Transactions on Computer and Communication Systems
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• v.3 no.5
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• pp.163-172
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• 2014

The Scale Invariant Feature Transform (SIFT) has been widely used in a lot of applications for image feature matching. Such a transform allows us to strong matching ability, stability in rotation, and scaling with the variety of different scales. Recently, it has been made one of the most successful algorithms in the research areas of copy-move forgery detections. Though this transform is capable of identifying copy-move forgery, it does not widely address the possibility that counter-forensics operations may be designed and used to hide the evidence of image tampering. In this paper, we propose a targeted counter-forensics method for impeding SIFT-based copy-move forgery detection by applying a semantically admissible distortion in the processing tool. The proposed method allows the attacker to delude a similarity matching process and conceal the traces left by a modification of SIFT keypoints, while maintaining a high fidelity between the processed images and original ones under the semantic constraints. The efficiency of the proposed method is supported by several experiments on the test images with various parameter settings.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.3
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• pp.577-582
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• 2016

The synchronous TDC(Time-to-Digital Converter) of counter-type using current-conveyor is designed by $0.18{\mu}m$ CMOS process and the supply voltage is 3 volts. In order to compensate the disadvantage of a asynchronous TDC the clock is generated when the start signal is applied and the clock is synchronized with the start signal. In the asynchronous TDC the error range of digital output is from $-T_{CK}$ to $T_{CK}$. But the error range of digital output is from 0 to $T_{CK}$ in the synchronous TDC. The error range of output is reduced by the synchronization between the start signal and the clock when the timing-interval signal is converted to digital value. Also the structure of the synchronous TDC is simple because there is no the high frequency external clock. The operation of designed TDC is confirmed by the HSPICE simulation.

• Journal of the Korea Society of Computer and Information
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• v.16 no.4
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• pp.149-157
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• 2011

Passive tags are inferior to active tags in processing efficiency, so they have difficulty in largevolume processing. The proposed protocol reduces the volume of computation in passive tags and, at the same time, improves authentication for enhanced safety and security. That is, different from existing RFID protocols that return the same value even if an error happens when the reader reads a tag, the improved RFID security protocol returns a new value using a re-counter and processes the computation part of a tag in the reader or in a back.end system. Even if the information of a tag is acquired by an malicious way, it is not actual information but encrypted information that is not usable. In addition, even if tag information is read in sequence, it is changed in each read, so the protocol is safe from Location Tracking.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.5
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• pp.137-147
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• 2008

Recently, Power and thermal management are becoming major concerns in computer system design. The energy efficiency is an important attribute of the mobile and embedded systems. Today's powerful mobile processors needs more energy and longer battery life. Many research has been focused to reduce energy consumption for the mobile processors.In this paper, performance monitoring system for the Power-management techniques is implemented for Intel's XScale microarchitecture-based Marvell PXA320 processor on Windows CE platform. It also provides software interface for changing DVFS configuration. Performance and power consumption are measured for benchmark programs through performance counter value and voltage/current measurements on LabVIEW platform. By using the developed monitoring system, it is possible for dynamic power management to track processor's workload and to determine the actual power consumption.

• Journal of the Korea Society of Computer and Information
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• v.13 no.4
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• pp.87-95
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• 2008

In this paper, we developed a selectable observation Point test architecture and test procedure for clocked 4-bit synchronous counter circuit based on boundary scan architecture. To develope, we analyze the operation of Sample/Preload instruction on boundary scan architecture. The Sample/Preload instruction make Possible to snapshot of outputs of CUT(circuit under test) at the specific time. But the changes of output of CUT during normal operation are not possible to observe using Sample/Preload in typical scan architecture. We suggested a selectable observation point test architecture that allows to select output of CUT and to observe of the changes of selected output of CUT during normal operation. The suggested a selectable observation point test architecture and test procedure is simulated by Altera Max 10.0. The simulation results of 4-bit counter shows the accurate operation and effectiveness of the proposed test architecture and procedure.