• Fire Science and Engineering
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• v.28 no.3
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• pp.1-9
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• 2014

In this study, it was developed to the design program optimization the design factors of the carbon dioxide fire extinguishing system on the basis of design theory for the carbon dioxide fire extinguishing system, national emergency management agency (NEMA) notice No. 2012-11, KS B 6261 and steepest descent method of optimization. The design program was developed to C++ compiler based on established the logic and algorithms and was to operate on the Windows operating system. The optimization of design factors for the carbon dioxide fire extinguishing system are minimized subject to constraint on agent flow rate, emission time and design variables (pipe size etc.). It was verified to the design program performance for test system, and it was provided to the foundation for optimal design in fire fighting field. Also, it is considered to improve the efficiency of the fire extinguishing system and to maximize of fire suppression as the construction of the carbon dioxide extinguishing system based on the optimal design factors.

• Journal of IKEEE
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• v.23 no.2
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• pp.529-533
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• 2019

Combined cycle power plants are often used to produce power. These days prediction of power plant output based on operating parameters is a major concern. This paper presents an approach to using computational intelligence technique to predict the output power of combined cycle power plant. Computational intelligence techniques have been developed and applied to many real world problems. In this paper, tree architectures of fuzzy neural networks are considered to predict the output power. Tree architectures of fuzzy neural networks have an advantage of reducing the number of rules by selecting fuzzy neurons as nodes and relevant inputs as leaves optimally. For the optimization of the networks, two-step optimization method is used. Genetic algorithms optimize the binary structure of the networks by selecting the nodes and leaves as binary, and followed by random signal-based learning further refines the optimized binary connections in the unit interval. To verify the effectiveness of the proposed method, combined cycle power plant dataset obtained from the UCI Machine Learning Repository Database is considered.

• Journal of the Korean Society of Propulsion Engineers
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• v.8 no.3
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• pp.27-36
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• 2004

This paper has been conducted to design for pressure regulation system. to simulate for performance of turbo pump unit using AMESim(Advanced Modeling Environment for Simulation of Engineering Systems). With optimized of system, pressure regulation system has been confirmed dynamic characteristics of transient and steady states range based on static modeling of open type turbo pump fed engine system. These results can be utilized to verify for performance test facility of propulsion control system for analysis on control valves, review of the fundamental principle on the control logic and certificating engine feeding system.

• Proceedings of the Acoustical Society of Korea Conference
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• 1998.08a
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• pp.14-22
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• 1998

본 연구에서는 Texas instruments 사의 저가형 부동소수점 디지털 신호 처리기인 TMS320C32를 이용하여 실시간 화자종속 음성인식 하드웨어 모듈을 개발하였다. 하드웨어 모듈의구성은 40MHz 의 TMS320C32, 14bit 코덱인 TLC32044, EPROM 과 SRAM 등의 메모리와 호스트 인터페이스를 위한 로직회로로 이루어져 있다. 뿐만 아니라 이 하드웨어 모듈을 PC 상에서 평가해보기 위한 PC 인터페이스용 보드 및 소프트웨어도 개발하였다. 음성인식 알고리즘은 C 및 어셈블리를 이용한 최적화를 통하여 계산속도를 대폭 개선하였다. 현재 인식률은 일반 사무실 환경에서 30단어에 대하여 95% 이상으로 매우 높은 편이며, 특히 배경음악이나 자동차 소음과 같은 잡음환경에서도 잘 동작한다.

• Journal of Energy Engineering
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• v.19 no.1
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• pp.39-50
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• 2010

Hybrid Electric Vehicle(HEV) and Plug-in Hybrid Electric Vehicle(PHEV) will replace Conventional Gasolene Engine Vehicle at a rapid rate to eliminate emission gases and improve fuel economy. This review describes Fuzzy Logic Control strategy and Optimization for Parallel Hybrid Electric Vehicle. Recent progress on Electric Motor and Li-ion Battery for HEV and PHEV are given. Analysis on competitiveness of Korean HEV and PHEV technology based on the number of papers published and patents registered are also performed.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.12
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• pp.2285-2290
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• 2008

Even though efficiency of coal-fired power plant is proportional to operating temperature, increasement of operating temperature is limited by a technological level of each power plant component. It is an alternative plan to increase operating pressure up to ultra super critical point for efficiency enhancement. It is difficult to control process of power plant in ultra super critical point because that point has highly nonlinear characteristics. In this paper, new control logic, Unit Response Optimizer Controller(URO Controller) which is based on Fuzzy logic and Model Predictive Controller, is introduced for better performance. Then its performance is tested and analyzed with design guideline.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.11a
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• pp.1139-1141
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• 2011

기존의 산업용 컨트롤러로 많이 사용되는 프로그래머블 로직 컨트롤러(PLC)를 사용할시 고비용과 큰 부피로 인해 정수기를 소형으로 만들기 어렵다. 따라서 본 가정용 정수기는 소형 MCU 사용과 동시에 정수기에 최적화된 PCB를 제작하여 정수기를 소형화 하였다. 재 프로그램 가능한 MCU 채택으로 추후 시스템이 변경되거나, 프로그램에 보완사항이 필요할 경우 손쉽게 업그레이드가 가능하도록 설계하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2008.05a
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• pp.549-552
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• 2008

부하를 분산하여 시스템 자원의 효율성을 제고하여 시스템의 안정성을 향상하고자 하는 연구는 부하분산 에이전트 이용, 네트워크 트래픽의 동적 감시를 통한 부한 분산, 클러스트 환경을 이용한 부하분산, Queue를 통한 트랜잭션을 제어에 의한 부하 분산 등이 있다. 또한 어플리케이션 부문은 프로그램 로직 단순화 및 SQL 최적화 등을 실시하여 부하를 경감하는 연구가 진행 되고 있다. 그러나 어플리케이션 부문의 튜닝을 실시하기 위한 대상 프로그램의 선정 및 튜닝 실시 후 사후 관리 방법에 대한 연구는 활발히 이루어지지 않았다. 따라서 본 논문은 시스템 부하 개선을 위한 튜닝 대상 프로그램 선정 모델을 제시하고, 이를 실 업무에 적용하여 본 연구 모델의 실용성을 검증 하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.102-107
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• 2007

This paper proposes a H.264/AVC entropy decoder without embedded processor nor memory fabrication process. Many researches on H.264/AVC entropy decoders require ROM or RAM fabrication process, which is difficult to be implemented in general digital logic fabrication process. Furthermore, many researches require embedded processors for bitstream manipulation, which increases area and power consumption. This papers proposes hardwired H.264/AVC entropy decoder without embedded processor, which improves data processing speed and reduces power consumption. Furthermore, its CAVLC decoder optimizes lookup table and internal buffer without embedded memory, which reduces hardware size and can be implemented in general digital logic fabrication process without ROM or RAM fabrication process. Designed entropy decoder was embedded in H.264/AVC video decoder, and it was verified to operate correctly in the system. Synthesized in TSMC 90nm fabrication process, its maximum operation frequency is 125MHz. It supports QCIF, CIF, and QVGA image format. Under slight modification of nC register and other blocks, it also support VGA image format.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6B
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• pp.1183-1190
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• 1999

This paper presents an efficient hardware architecture to improve the frame memory interface occupying the largest hardware area together with motion estimator in implementing MPEG-2 video encoder as an ASIC chip. In this architecture, the memory size for internal data buffering and hardware area for frame memory interface control logic are reduced through the efficient memory map organization of the external SDRAM having dual bank and memory access timing optimization between the video encoder and external SDRAM. In this design, 0.5 m, CMOS, TLM (Triple Layer Metal) standard cells are used as design libraries and VHDL simulator and logic synthesis tools are used for hardware design add verification. The hardware emulator modeled by C-language is exploited for various test vector generation and functional verification. The architecture of the improved frame memory interface occupies about 58% less hardware area than the existing architecture[2-3], and it results in the total hardware area reduction up to 24.3%. Thus, the (act that the frame memory interface influences on the whole area of the video encoder severely is presented as a result.