• Title/Summary/Keyword: 차동증폭기

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A Process Detection Circuit using Self-biased Super MOS composit Circuit (자기-바이어스 슈퍼 MOS 복합회로를 이용한 공정 검출회로)

  • Suh Benjamin;Cho Hyun-Mook
    • Journal of the Institute of Convergence Signal Processing
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    • v.7 no.2
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    • pp.81-86
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    • 2006
  • In this paper, a new process detection circuit is proposed. The proposed process detection circuit compares a long channel MOS transistor (L > 0.4um) to a short channel MOS transistor which uses lowest feature size of the process. The circuit generates the differential current proportional to the deviation of carrier mobilities according to the process variation. This method keep the two transistor's drain voltage same by implementing the feedback using a high gain OPAMP. This paper also shows the new design of the simple high gam self-biased rail-to-rail OPAMP using a proposed self-biased super MOS composite circuit. The gain of designed OPAMP is measured over 100dB with $0.2{\sim}1.6V$ wide range CMR in single stage. Finally, the proposed process detection circuit is applied to a differential VCO and the VCO showed that the proposed process detection circuit compensates the process corners successfully and ensures the wide rage operation.

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Desgin of Low-power, Low-noise Preamplifier for Digital Hearing-Aids (디지털 보청기를 위한 저전력, 저잡음 전치증폭기 설계)

  • Im, Saemin;Park, Sang-Gyu
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.12
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    • pp.219-225
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    • 2012
  • A low-power, low-noise pre-amplifier for digital hearing-aid application is designed. This pre-amplifier amplifies single-ended signal from an electret microphone, and produces differential output to be delivered to an ADC. It has a variable gain of 3.6, 7.2, 14.4 and 28.8 with a bandwidth between 100Hz~10kHzon. The measurement results show 85 dB of SNR, 0.05 % of harmonic distortion and $200{\mu}W$ of power consumption with 1.2V supply.

Design of High-Gain OP AMP Input Stage Using GaAs MESFETs (갈륨비소 MESFET를 이용한 고이득 연산 증폭기의 입력단 설계)

  • 김학선;김은노;이형재
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.17 no.1
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    • pp.68-79
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    • 1992
  • In the high speed analog system satellite communication system, video signal processing and optical fiber interface circuits, GaAs high gain operational amplifier is advantageous due to obtain a high gain because of its low transconductance and other drawbacks, such as low frequency dispersion and process variation. Therefore in this paper, a circuit techniques for improving the voltage gain for GaAs MESFET amplifier is presented. Also, various types of existing current mirror and current mirror proposed are compared.To obtain the high differential gain, bootstrap gain enhancement technique is used and common mode feedback is employed in differential amplifier.The simulation results show that gain is higher than that of basic amplifier about 18.6dB, and stability and frequency performance of differential amplifier are much improved.

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Design & Fabrication of a Broadband SiGe HBT Variable Gain Amplifier using a Feedforward Configuration (Feedforward 구조를 이용한 광대역 SiGe HBT 가변 이득 증폭키의 설계 및 제작)

  • Chae, Kyu-Sung;Kim, Chang-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.5A
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    • pp.497-502
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    • 2007
  • Broadband monolithic SiGe HBT variable gain amplifier with a feedforward configuration have been newly developed to improve bandwidth and dB-linearly controlled gain characteristics. The VGA has been implemented in a $0.35-{\mu}m$ BiCMOS process. The VGA achieves a dynamic gain-control range of 19.6 dB and a 3-dB bandwidth of 4 GHz ($4{\sim}8\;GHz$) with the control-voltage range from 0.6 to 2.6 V. The VGA produces a maximum gain of 9.3 dB at 6 GHz and a output power of -3 dBm at 8 GHz.

The Gain Enhancement of 1.8V CMOS Self-bias High-speed Differential Amplifier by the Parallel Connection Method (병렬연결법에 의한 1.8V CMOS Self-bias 고속 차동증폭기의 이득 개선)

  • Bang, Jun-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.10
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    • pp.1888-1892
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    • 2008
  • In this paper, a new parallel CMOS self-bias differential amplifier is designed to use in high-speed analog signal processing circuits. The designed parallel CMOS self-bias differential amplifier is developed by using internal biasing circuits and the complement gain stages which are parallel connected. And also, the parallel architecture of the designed parallel CMOS self-bias differential amplifier can improve the gain and gain-bandwidth product of the typical CMOS self-bias differential amplifier. With 1.8V $0.8{\mu}m$ CMOS process parameter, the results of HSPICE show that the designed parallel CMOS self-bias differential amplifier has a dc gain and a gain-bandwidth product of 64 dB and 49 MHz respectively.

An analytical consideration of the MOS type field-effect transistor differential amplifier (MOS형 전계효과 트랜지스터 차동증폭기에 관한 소고)

  • 정만영
    • 전기의세계
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    • v.14 no.6
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    • pp.1-7
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    • 1965
  • This paper provides the analysis of the differential amplifier using the insulated gate, metala-oxide-semiconductor type field-effect-transistor(MOS FET), for its active element and the power drift of the amplifer. From these analytical considerations some design standardsn were found for the MOS FET differential amplifier available for the measurement of the very small current (pico-ampare range). A differential amplifier was designed and built in the view of above considerations. Its equivalent input gate voltages of the thermal drift and the power drift were 0.57mV/.deg. C in the range 25.deg. C-60.deg. C and 8.8mV/V in the range of 20% drift of its orginal value, respectively.

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Fault current limiting technology to protect DC distribution systems (직류배전계통의 보호를 위한 고장전류제한기술)

  • Lee, Sungmin;Kim, Hyosung
    • Proceedings of the KIPE Conference
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    • 2012.11a
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    • pp.1-2
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    • 2012
  • 본 논문에서는 직류배전의 보호를 위한 고장전류제한기술을 제안한다. 제안된 전류제한기는 PWM스위칭 방식으로 동작하며 차동증폭기, 비교기, MOSFET스위치와 게이트드라이버로 구성되어 있다. 전류제한기는 부하 측의 단락사고나 돌입전류를 제어하기 위한 목적으로 직류리액터 $L_f$에 흐르는 전류를 센싱하여 기준전류 $L_{ref}$보다 높게 흐르려는 경우 MOSFET은 ON/OFF스위칭 하여 기준전류 $L_{ref}$이상으로 흐르지 못하게 함으로써 과전류가 흐르는 것을 방지한다. 제안된 전류제한기의 성능을 실험을 통하여 검증 한다.

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4-Channel 2.5-Gb/s/ch CMOS Optical Receiver Array for Active Optical HDMI Cables (액티브 광케이블용 4-채널 2.5-Gb/s/ch CMOS 광 수신기 어레이)

  • Lee, Jin-Ju;Shin, Ji-Hye;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.8
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    • pp.22-26
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    • 2012
  • This paper introduces a 2.5-Gb/s optical receiver implemented in a standard 1P4M 0.18um CMOS technology for the applications of active optical HDMI cables. The optical receiver consists of a differential transimpedance amplifier(TIA), a five-stage differential limiting amplifier(LA), and an output buffer. The TIA exploits the inverter input configuration with a resistive feedback for low noise and power consumption. It is cascaded by an additional differential amplifier and a DC-balanced buffer to facilitate the following LA design. The LA consists of five gain cells, an output buffer, and an offset cancellation circuit. The proposed optical receiver demonstrates $91dB{\Omega}$ transimpedance gain, 1.55 GHz bandwidth even with the large photodiode capacitance of 320 fF, 16 pA/sqrt(Hz) average noise current spectral density within the bandwidth (corresponding to the optical sensitivity of -21.6 dBm for $10^{-12}$ BER), and 40 mW power dissipation from a single 1.8-V supply. Test chips occupy the area of $1.35{\times}2.46mm^2$ including pads. The optically measured eye-diagrams confirms wide and clear eye-openings for 2.5-Gb/s operations.

A Design of Novel Instrumentation Amplifier Using a Fully-Differential Linear OTA (완전-차동 선형 OTA를 사용한 새로운 계측 증폭기 설계)

  • Cha, Hyeong-Woo
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.1
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    • pp.59-67
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    • 2016
  • A novel instrumentation amplifier (IA) using fully-differential linear operational transconductance amplifier (FLOTA) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of a FLOTA, two resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into FLOTA converts into two same difference currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the FLOTA and realized the IA used commercial op-amp LF356. Simulation results show that the FLOTA has linearity error of 0.1% and offset current of 2.1uA at input dynamic range ${\pm}3.0V$. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the 60dB was 10MHz. The proposed IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 105mW at supply voltage of ${\pm}5V$.

Design of Current-Mode Class-D 900 MHz RF Power Amplifier Using Inverse Class-F Technology (Inverse Class-F 기법을 이용한 900 MHz 전류 모드 Class-D RF 전력 증폭기 설계)

  • Kim, Young-Woong;Lim, Jong-Gyun;Kang, Won-Shil;Ku, Hyun-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.12
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    • pp.1060-1068
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    • 2011
  • In this paper, Current-Mode Class-D(CMCD) RF Power Amplifier(PA) is designed and implemented at 900 MHz. Conventional CMCD PA has output parallel resonator to reconstruct a fundamental frequency component of the output signal. However the resonator can be removed by connecting inverse class-F PAs because even-harmonic components can be removed by CMCD PA's push-pull structure. Using load-pull, inverse class-F PA with GaN transistors is designed, and CMCD PA with the inverse class-F PA is implemented. The CMCD PA has 64.5 % drain efficiency, 34.2 dBm output power. Comparing with the drain efficiency of a CMCD PA with parallel resonator, the CMCD with the inverse class-F technology has 13.6 % improved drain efficiency.