• Title/Summary/Keyword: 지연 모델

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Concrete Strength Prediction Neural Network Model Considering External Factors (외부영향요인을 고려한 콘크리트 강도예측 뉴럴 네트워크 모델)

  • Choi, Hyun-Uk;Lee, Seong-Haeng;Moon, Sungwoo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.12
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    • pp.7-13
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    • 2018
  • The strength of concrete is affected significantly not only by the internal influence factors of cement, water, sand, aggregate, and admixture, but also by the external influence factors of concrete placement delay and curing temperature. The objective of this research was to predict the concrete strength considering both the internal and external influence factors when concrete is placed at the construction site. In this study, a concrete strength test was conducted on the 24 combinations of internal and external influence factors, and a neural network model was constructed using the test data. This neural network model can predict the concrete strength considering the external influence factors of the concrete placement delay and curing temperature when concrete is placed at the construction site. Contractors can use the concrete strength prediction neural network model to make concrete more robust to external influence factors during concrete placement at a construction site.

Link-wirelength-aware Topology Generation for High Performance Asynchronous NoC Design (링크 도선 길이를 고려한 고성능 비동기식 NoC 토폴로지 생성 기법)

  • Kim, Sang Heon;Lee, Jae Sung;Lee, Jae Hoon;Han, Tae Hee
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.8
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    • pp.49-58
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    • 2016
  • In designing heterogeneous architecture based application-specific network-on-chips (NoCs), the opportunities of performance improvement would be expanded when applying asynchronous on-chip communication protocol. This is because the wire latency can be configured independently considering the wirelength of each link. In this paper, we develop the delay model of link-wire-length in asynchronous NoC and propose simulated annealing (SA) based floorplan-aware topology generation algorithm to optimize link-wirelengths. Incorporating the generated topology and the associated latency values across all links, we evaluate the performance using the floorplan-annotated sdf (standard delay format) file and RTL-synthesized gate-level netlist. Compared to TopGen, one of general topology generation algorithms, the experimental results show the reduction in latency by 13.7% and in execution time by 11.8% in average with regards to four applications.

A Priority Allocation Scheme Considering Virtual Machine Scheduling Delays in Xen Environments (Xen 환경에서 스케줄링 지연을 고려한 가상머신 우선순위 할당 기법)

  • Yang, Eun-Ji;Choi, Hyun-Sik;Han, Sae-Young;Park, Sung-Yong
    • Journal of KIISE:Computer Systems and Theory
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    • v.37 no.4
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    • pp.246-255
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    • 2010
  • There exist virtual machine scheduling delays in virtualized environment in which virtual machines share physical resources. Many resource management systems have been proposed to provide better application QoS through monitoring and analyzing application performance and resource utilization of virtual machines. However, those management systems don't consider virtual machine scheduling delays, result in incorrect application performance evaluation and QoS violations In this paper, we propose an application behavior analysis considering the scheduling delays, and a virtual machine priority allocation scheme based on the analysis to improve the application response time by minimizing the overall virtual machine scheduling delays.

An Analysis Technique for Interconnect Circuits with Multiple Driving Gates in Deep Submicron CMOS ASICs (Deep Submicron CMOS ASIC에서 다중 구동 게이트를 갖는 배선회로 해석 기법)

  • Cho, Kyeong-Soon;Byun, Young-Ki
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.12
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    • pp.59-68
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    • 1999
  • The timing characteristics of an ASIC are analyzed based on the propagation delays of each gate and interconnect wire. The gate delay can be modeled using the two-dimensional delay table whose index variables are the input transition time and the output load capacitance. The AWE technique can be adopted as an algorithm to compute the interconnect delay. Since these delays are affected by the interaction to the two-dimensional delay table and the AWE technique. A method to model this effect has been proposed through the effective capacitance and the gate driver model under the assumption of single driving gate. This paper presents a new technique to handle the multiple CMOS gates driving interconnect wire by extending previous approach. This technique has been implemented in C language and applied to several interconnect circuits driven by multiple CMOS gates. In most cases, we found a few tens of speed-up and only a few percents of errors in computing both of gate and interconnect delays, compared to SPICE.

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Digital Modeling of a Time delayed Continuous-Time System (시간 지연 연속 시간 시스템의 디지털 모델링)

  • Park, Jong-Jin;Choi, Gyoo-Seok;Park, In-Ku;Kang, Jeong-Jin
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.12 no.1
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    • pp.211-216
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    • 2012
  • Control Theory for continuous-time system has been well developed. Due to the development of computer technology, digital control scheme are employed in many areas. When delays are in control systems, it is hard to control the system efficiently. Delays by controller-to-actuator and sensor-to-controller deteriorate control performance and could possibly destabilize the overall system. In this paper, a new approximated discretization method and digital design for control systems with multiple state, input and output delays and a generalized bilinear transformation method with a tunable parameter are also provided, which can re-transform the integer time-delayed discrete-time model to its continuous-time model. Illustrative example is given to demonstrate the effectiveness of the developed method.

Convergence Study on the Optimization for Suppression of Starch Hydrolysis using Rutin, Quercetin and Dietary Fiber Mixture Design (루틴, 퀘르세틴, 식이섬유 혼합물 설계를 이용한 전분소화 지연 효과의 최적화에 대한 융합 연구)

  • Oh, Imkyung;Bae, In Young
    • Journal of the Korea Convergence Society
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    • v.11 no.5
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    • pp.35-41
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    • 2020
  • This study was conducted to develop the efficient system for starch hydrolysis suppression using rutin, quercetin and dietary fiber through the statistical mixture design. The three components were replaced with wheat flour at the level of 10% and the mixed gel with three components was characterized by in vitro starch digestion. The mixture design was applied by simplex-centroid experimental model. The quadratic model (R2=0.86) was well fitted and the obtained regression equation indicated that the significant positive effects was observed in the quercetin and fiber mixture. Based on the statistical results, the best mixing ratio of quercetin and fiber was 72: 28 that led to the lowest predicted glycemic index (pGI). Their interactions on the pGI of starch digestibility were clearly visualized in the 3D surface plot. These results suggested that the mixture of quercetin and fiber interact strongly with wheat flour, consequently retarding starch hydrolysis by 15%.

VLSI Design for Automatic Magnetizing and Inspection System (자동착자 및 검사자동화 시스템을 위한 집적회로 설계)

  • Im, Tae-Yeong;Lee, Cheon-Hui
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.7
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    • pp.1929-1940
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    • 1999
  • In this paper a VLSI design for the automatic magnetizing and inspection system has been presented. This is a design of a peripheral controller, which magnetizes CRTs and computer monitors and controls the automatic inspection system. We implemented a programmable peripheral interface(PPI) circuit of the control and protocol module for the magnetizer controller by using a 0.8um CMOS SOG technology of ETRI. Most of the PPI functions have been confirmed. In the conventional method, the propagation/ramp delay model was used to predict the delay of cells, but used to model on only a single cell. Later, a modified "linear delay predict model" was suggested in the LODECAP(LOgic DEsign CAPture) by adding some factors to the prior model. But this has not a full model on the delay chain. In this paper a new " delay predict equation" for the design of the timing control block in PPI system has been suggested. We have described the detail method on a design of delay chain block according to the extracted equation and applied this method to the timing control block design. And we had descriptions on the other blocks of this system.

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Development of SVM-based Construction Project Document Classification Model to Derive Construction Risk (건설 리스크 도출을 위한 SVM 기반의 건설프로젝트 문서 분류 모델 개발)

  • Kang, Donguk;Cho, Mingeon;Cha, Gichun;Park, Seunghee
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.43 no.6
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    • pp.841-849
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    • 2023
  • Construction projects have risks due to various factors such as construction delays and construction accidents. Based on these construction risks, the method of calculating the construction period of the construction project is mainly made by subjective judgment that relies on supervisor experience. In addition, unreasonable shortening construction to meet construction project schedules delayed by construction delays and construction disasters causes negative consequences such as poor construction, and economic losses are caused by the absence of infrastructure due to delayed schedules. Data-based scientific approaches and statistical analysis are needed to solve the risks of such construction projects. Data collected in actual construction projects is stored in unstructured text, so to apply data-based risks, data pre-processing involves a lot of manpower and cost, so basic data through a data classification model using text mining is required. Therefore, in this study, a document-based data generation classification model for risk management was developed through a data classification model based on SVM (Support Vector Machine) by collecting construction project documents and utilizing text mining. Through quantitative analysis through future research results, it is expected that risk management will be possible by being used as efficient and objective basic data for construction project process management.

Performance Analysis of Service Model between server and client on PMSS System (PMSS 시스템에서 서버/클라이언트 간 서비스 모델의 성능분석)

  • Lee, Min-Hong;Kim, Kyung-Hoon;Nam, Ji-Seung
    • The KIPS Transactions:PartA
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    • v.11A no.3
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    • pp.207-212
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    • 2004
  • This paper provides the higher user QoS(Quality of Service) by analyzing media service model between server and client in single VoD(Video on Demand) environment and applying it to parallel VoD environment. Media service model is divided into the Client Pull, Server Push, and IPP(Interleaving Pull & Push) model. A server sends data based on client's request in the Client Pull Model. A server one-sidedly sends data without client's request in the Server Pull model. And the WP model unites above two models. For a parallel VoD environment, We built the PMSS system which provides the parallel media streaming services that one client is simultaneously served by several servers. In the single and parallel VoD environment, We compare and analyze the performance of service models with respect to network delay and data size in buffer. In this experiment, we found that IPP service model keeps the least network delay and stable client buffer in the parallel VoD environment. This result shows that PMSS can provide the more quality of service.

Experimental Study of System Identification for Seismic Response of Building Structure (건축구조물의 지진응답제어를 위한 시스템 식별의 실험적 연구)

  • 주석준;박지훈;민경원;홍성목
    • Journal of the Earthquake Engineering Society of Korea
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    • v.3 no.4
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    • pp.47-60
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    • 1999
  • The stability and efficiency of structural control systems depend on the accuracy of mathematical model of the system to be controlled. In this study, state equation models of a small scale test structure and an AMD(active mass damper) are obtained separately using OKID(observer/Kalman filter identification) which is a time domain system identification method. The test structure with each floor acceleration as outputs is identified for two inputs - the ground acceleration and the acceleration of the moving mass of AMD relative to the installation floor - individually and the two identified state equation models are integrated into one by model reduction method. The AMD is identified with the motor control signal as an input and the relative acceleration of the moving mass as an output, and it is shown that the identified model has large damping ratio and phase shift. The transfer functions and the time histories reconstructed from the identified models of the test model and the AMD match well with those measured from the experiment.

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