• Proceedings of the Korean Information Science Society Conference
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• 1998.10a
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• pp.48-50
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• 1998

메시지에 기반을 둔 다중컴퓨터는 프로세서들 간에 고속통신을 위한 연결 망을 요구한다. ATM 스위치는 대규모의 다중컴퓨터를 구성하기에 유리한 접근 방식을 제공하며, 낮은 지연시간과 고성능을 제공하는 특성을 가진다. 본 논문은 고속 ATM 스위치를 통한 프로세서들간의 정보를 송신/수신하는 셀 라우터를 설명한다. 고속 ATM 스위치를 효율적으로 사용하기 위하여, 본 논문은 다중화와 역 다중화를 가지고 계층적 구조를 제안한다. 일반 연결 망에서 라우팅을 위해 착신주소를 가지는 기본단위는 메시지이지만, ATM 망에서는 셀이라고 부르는 고정된 크기의 프레임이 기본단위이다. 셀은 VPI와 VCI를 가지며, 이는 송신/수신 프로세서의 구별자로서 사용된다 결론적으로 제안한 고속 셀 라우터와 계층적 구조는 메시지 전송지연의 관점에서 이점을 가질 수 있다.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.11
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• pp.44-52
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• 1998

In this paper, we proposed a node architecture and cell routing strategies for ATM applications in WDM multihop networks. The proposed node architecture employs the optical delay loop for storing the cell which is failed in out-link contention. This optical delay loop allows the delay of one cell without the electro-optic conversion. Therefore, we can get the advantages of S&F(Store-and-Forward) routing in Deflection-based all-optical networks. To support the ATM applications efficiently. we considered the transmission priority of ATM cell so that high priority cell can be transmitted with lower loss and shorter delay than low priority one. Two kinds of routing strategies are designed for this architecture: Scheme-Ⅰand Scheme-Ⅱ. Scheme-Ⅰapplies S&F routing to high cell and Deflection routing to low cell, i.e., high cells are routed along the shortest path based on S&F routing, but low cells are deflected or lost. Schem-Ⅱ is similar to Scheme-Ⅰexcept that low cells can occupy the optical loop if it is available. This Scheme-Ⅱ increases the utilization of network resources without decreasing the throughput of high cell by reducing the low cell loss rate when traffic load is low. Simulation results show that our routing strategies have better performance than conventional ones under non-uniform traffic as well as uniform traffic.

• The Transactions of the Korea Information Processing Society
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• v.2 no.5
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• pp.667-676
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• 1995

In ATM traffic multiplexing, the cell clumping and the cell dispersion are occured due to the cell delay variance(CDV) which changes the traffic characteristics. These cell variances increase the burstiness of t.he cell streams and make the network congested. The function of the traffic shaping is necessary to transmit the input streams into the networks or into the traffic policing schemes with some intevals. Most of the existing studies regard the input traffics as the traffic with the identical characteristics. In this study, the traffic shaping is processed by considering the traffic characteristICS with t.he loss-sensitive traffic and the delay-sensitive traffic. The traffic shaping model and the traffic shaping algorithm which considers the" characteristics of input streams have been presented. The traffic effect On t.he CDV size is also studied. The proposed scheme is compared to Virtual Scheduling Algorithm(VSA) and the efficiency of the proposed scheme is evaluated. According to the simulation results, t.he mean delay is decreased about 12% in delay-sensitive traffic and the traffic burstiness is decreased about 11 % in loss-sensitive traffic.

• Journal of the Korea Society of Computer and Information
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• v.6 no.3
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• pp.44-49
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• 2001

In general. requirements for QoS are different according to the type of services in wireline and wireless ATM, and real-time video service is more sensitive to cell transmission delay than to cell loss. Existing handoff schemes emphasizing prevention of cell loss had limitations in cell transmission delay to satisfy QoS. In this paper, a novel scheme to transmit ATM cells with low CLP (when CLP = 0) prior to others and discarding cells with high CLP (when CLP = 1) in ATM cell header among cells to be forwarded during handoffs in real-time VBR service is proposed. The proposed scheme is proven to be suitable for the satisfaction of QoS and appropriate for fast handoffs by giving high CLP value to less meaningful MPEG frames through simulations.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.2
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• pp.84-92
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• 2007

This paper proposes an interconnect delay fault test (IDFT) solution on boards and SoCs based on IEEE 1149.1 and IEEE P1500. A new IDFT system clock rising edge generator which forces output boundary scan cells to update test data at the rising edge of system clock and input boundary scan cells to capture the test data at the next rising edge of the system clock is introduced. Using this proposed circuit, IDFT for interconnects synchronized to different system clocks in frequency can be achieved efficiently. Moreover, the proposed IDFT technique does not require any modification of the boundary scan cells or the standard TAP controller and simplifies the test procedure and reduces the area overhead.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12C
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• pp.261-267
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• 2001

This paper presents the architecture of multiple-queue manager for input-queued switch, which has arbitration latency, and the design of the chip. The proposed architecture of multiple-queue manager provides wire-speed routing with a pipelined buffer management, and the tolerance of requests and grants data transmission latency between the input queue manager and central arbiter using a new request control method, which is based on a high-speed shifter. The multiple-input-queue manager has been implemented in a field programmable gate array chip, which provides OC-48c port speed. It enhances the maximum throughput of the input queuing switch up to 98.6% with 128-cell shared input buffer in 16$\times$16 switch size.

• The KIPS Transactions:PartC
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• v.9C no.4
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• pp.531-542
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• 2002

An input and output buffering ATM switch conventionally operates in either Queueloss mode or Backpressure mode. Recently, a new mode, which is called Hybrid mode, was proposed to overcome the drawbacks of Queueloss mode and Backpressure mode. In Hybrid mode, when both the destined output buffer and the originfted input buffer are full, a cell is dropped. This thesis analyzes the cell loss rate and the cell delay of Queueloss, Backpressure and Hybrid modes in a switch adopting output-port expansion scheme under uniform traffic. Output-port expansion scheme allows only one cell from an input buffer to be switched during one time slot. If several cells switch to a same destined output port, the number of maximum transfer cells is restricted to K (Output-port expansion ratio). The simulation results show that if an offered load is less than 0.9, Hybrid mode has lower cell loss rate than the other modes; otherwise, Queueloss mode illustrates the lowest cell loss rate, which is a different result from previous researches. However, the difference between Hybrid and Queueloss modes is comparably small. As expected, the average cell delay in Backpressure mode is lower than those of Queueloss mode and Hybrid mode, since the cell delay due to the retransmission of higher number of dropped cells in Backpressure mode is not considered.

• Proceedings of the Korean Information Science Society Conference
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• 1999.10c
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• pp.375-377
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• 1999

본 논문에서는 지금까지 제시된 다양한 동적 COS (CrossOver Switch) 선택 방식들을 4가지 유형을 분류하였다. 그리고 ATM 포럼에서 제안된 순방향 핸드오버와 역방향 핸드오버의 손실 방지 핸드오버와 손실허용 핸드오버 방식에 대해 COS의 위치에 따른 영향을 핸드오버 지연, 사용자의 서비스 중단 시간, 셀 버퍼링양 및 셀 손실 관점, 그리고 경로 재사용 효율과 종단간 전송 지연 관점에서 수식적으로 분석하였다. 이러한 분석을 바탕으로 무선 ATM의 역방향 핸드오버에 대한 적절한 COS 선택 기준을 각 방식별/성능 평가 요소별로 제시되었다.

• Proceedings of the Acoustical Society of Korea Conference
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• spring
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• pp.275-278
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• 2002

본 논문에서는 한국의 전파환경을 도시 계획법에서 지정한 지역세분을 기초로 4개의 대분류와 8개로 소구분하여 Kor-231 모델을 제안하였다. 전파전파 특성을 측정하기 위해 슬라이딩 코릴레이션 기법을 이용한 대역확산 송${\cdot}$수신 방식으로 구현하여 수신전력, 평균 초과지연 그리고 RMS 지연확산을 가장 도시계획적으로 개발된 공업 지역과 주거지역에서 직선 도로에 마이크로셀을 배치하여 도로를 따라 진행하는 LOS와 건물들로 둘러쌓인 N-LOS에서 측정된 데이터를 분석하여 한국의 전파환경에서 잘 적용됨을 확인 하였다.

• The KIPS Transactions:PartC
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• v.8C no.4
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• pp.389-396
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• 2001

기존의 라우터 기반의 패킷 스크리닝 방식은 ATM 네트워크 상에서는 패킷 수준의 스크리닝 기능의 적용을 위하여 SAR(Segmentation And Reassembly) 과정을 필요로 하기 때문에 고속의 셀 처리를 수행하는 ATM Switch의 셀 처리 속도를 저하시킨다는 문제점을 안고 있다. 본 논문에서는 셀 스크리닝 방식에 기반한 병렬 처리 구조의 ATM Firewall Switch를 제안한다. 제안된 Enhanced ATM Firewall Switch는 셀 단위로 분할된 패킷의 1, 2번 셀들에 대한 검사만을 통하여 스크리닝 기능을 수행하기 때문에 셀 단위의 스크리닝 수행이 가능하며, 정책 캐쉬의 도입을 통해 셀 스크리닝 수행속도를 향상하였다. 또한 독립적인 User Cells Filter 기능 블록의 설계를 통하여 병렬 처리 구조의 셀 스크리닝 수행이 가능하도록 구성하여 셀 지연 시간을 최소화하였다.