• Proceedings of the Korea Information Processing Society Conference
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• 2005.05a
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• pp.1473-1476
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• 2005

데이터 주소의 계수를 위한 하드웨어 설계가 없는 본 노이만(von Neumann) 개념(SISD)의 컴퓨터에서 데이터의 주소지정은 소프트웨어적으로 수행된다. 그러므로 벡터 데이터 요소들의 주소지정은 인덱싱 기법에 의해 그 요소 수만큼 해당 변수들을 만들어서 사용해야 한다. 이것은 데이터 계수기 없이 명령어 계수기, 즉 PC(program counter)만 하드웨어로 설계되기 때문이다. 본 연구에서는 중앙처리장치 외부에 외형적 구조와 크기를 갖는 단위 벡터의 요소를 액세스하는 하드웨어 유닛의 설계를 제안한다. 제안한 방법은 시뮬레이션을 통하여 성능 검증을 하였으며, 실험 결과 동일한 프로세싱 유닛을 가지는 벡터 머신 아키텍쳐보다 12 - 30 % 정도 우수한 성능을 내는 것을 확인하였다.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.531-532
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• 2015

마이크로그리드 내에서 기존의 중앙 제어 방식은 중앙 제어기가 방대한 데이터의 수집 및 처리를 포함해 제어 결정까지 대부분을 부담하여 확장성과 유연성이 좋지 않다. 따라서 이를 위한 해결책으로 부담을 나눌 수 있는 분산 제어가 필요하다. 본 논문에서는 Multi Agent System(MAS)를 기반으로 일치 알고리즘을 이용한 정보 공유를 통해 유닛들의 분산 제어를 제시하였고 캠퍼스 마이크로그리드에 대한 적용가능성을 분석했다.

• Journal of the Institute of Convergence Signal Processing
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• v.12 no.3
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• pp.222-227
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• 2011

2-axis tracking solar PV system applying a fixed-type unit than in the same area as the panel's power output to more than 140% can be obtained that have been identified. However, this approach compared with fixed or 1-axis control system and control the complexity of trekking equipment power the cursor comes to a relatively small output PV unit is called. In this paper, a small PV power units as a way to improve the economics of the small output of multiple PV units in the central control unit in enclosed places an intermittent manner by a remote control for each unit of the trek at the same time to simplify the control mechanism to reduce power that will be introduced. also the construction of large-scale PV development plans in difficult environments can be utilized in a manner appropriate to introduce.

• The KIPS Transactions:PartA
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• v.12A no.3 s.93
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• pp.263-272
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• 2005

The addressing mode for data is performed by the software in yon Neumann-concept(SISD) computer a priori without hardware design of an address counter for operands. Therefore, in the addressing mode for the vector the corresponding variables as much as the number of the elements should be specified and used also in the software method. This is because not for operand but only for an instructions, quasi PC(program counter) is designed in hardware physically. A vector has a characteristic of a structural dimension. In this paper we propose to design a hardware unit physically external to the CPU for addressing only the elements of a vector unit with the structure and dimension. Because of the high speed performance for a vector processing it should be designed in the SIMD pipeline mechanics. The proposed mechanics is evaluated through a simulation. Our result shows $12\%$ to $30\%$ performance enhancement over CRAY architecture under the same hardware consideration(processing unit).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.9
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• pp.1650-1657
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• 2007

In this paper, we propose an Overlapped Block and an Hanning Window to prevent a Block Discontinuity when we use an algorithm to eliminate ringing artifact which is based on a block structure. The algorithm to eliminate ringing artifact operates with a block structure and 24-RGB data and is based on a modified K-means algorithm. The proposed overlapped block method is piled up one on another per an half of the size of unit-block when an input image is split into several unit-blocks. Therefore, we define a data unit as the unit-block of the block size, $16{\times}16$ pixels. We reconstruct the processed data units into the original form of input image by using an isotropic form of Hanning Window. Finally, in order to evaluate the performance of the abovementioned algorithms, we compare three image, an input image with ringing artifact, an image result obtained by conventional method (non-overlapped), and an image result obtained the proposed method.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.34 no.2
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• pp.101-105
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• 2006

The Engineering Model of STSAT-2 on-board computer(OBC) was developed and tested completely with other sub-systems. The on-board computer of STSAT-2 has a high- performance PowerPC processors and a structure of centralized network communication. In addition, a lot of logics are implemented by Field Programmable Gate Array, such as interrupt controller, watchdog timer and UART. It could make the weight and size of OBC lighter and smaller. Also, the STSAT-2 on-board computer has more improved tolerance against Single Event Upsets and faults than that of the STSAT-1.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.12
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• pp.1650-1658
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• 2019

In recent years, IoT device and platform become widely popular and the computing performance and capabilities of IoT devices are also getting improved. However, the size and computing resources of IoT devices, especially small single board computer, are limited in a way that the design and implementation of the system should be carefully considered to operate on the devices. Recently, SDR technologies are adapting in IoT devices and can perform various radio systems. Thorough analysis and investigation of computer performances on small single board computer are necessary for its usage. In this paper, we present the results of computing resources measurement and analysis on small single-board computers. At first, we consider to design SDR based spectrum sensing for single board computer, investigate various key factors and propose a design procedure that can affect performance of the system with experiments.