• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.9
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• pp.964-970
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• 2002

In this paper, cruciform radiation pattern antenna was designed and fabricated. The fabricated antenna is applicable to intersections which is composed of four eight-lane roads each having 60 m of width and 200 m of length. The design theory was based on Woodward-Lawson method and the 6 monopole elements with the strip feeding network are made by linear array on the micro-strip board. In the results, - 13.5 dB of return loss and 120 MHz(6 %) of -10 dB bandwidth were obtained at the 2 GHz. Also, at 1.95 GHz, -6 dB of gain fall was seen at $\pm$45$^{\circ}$ and thus, it is possible to say that the presented antenna has well-shaped cruciform radiation pattern.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.2
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• pp.391-396
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• 2013

In this paper, for HEVC decoding, an SAO hardware design with less processing time and reduced area is proposed. The proposed SAO hardware architecture introduces the design processing $8{\times}8$ CU to reduce the hardware area and uses internal registers to support $64{\times}64$ CU processing. Instead of previous top-down block partitioning, it uses bottom-up block partitioning to minimize the amount of calculation and processing time. As a result of synthesizing the proposed architecture with TSMC $0.18{\mu}m$ library, the gate area is 30.7k and the maximum frequency is 250MHz. The proposed SAO hardware architecture can process the decode of a macroblock in 64 cycles.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.2 s.93
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• pp.120-127
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• 2005

The design method of the transversal filter using continuously cascaded directional couplers is presented. The coupler can be treated for a continuously varying nonuniform coupled transmission line. The design method is based on the optimum extraction of desired coupling factor by the control of null positions which are inherent to the coupling spectra pattern. In the optimization process, the improved Woodward-Lawson sampling method is applied to easily synthesize the distributed delay and weighting elements for transversal filter properties. For application, the microstrip transversal filter is fabricated and optimum dielectric overlay is introduced for the mode phase velocity compensation for non-TEM coupler nodes by using SDA(Spectral Domain Approach). Experiment results confirm the validity of the proposed method.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.11
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• pp.1285-1294
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• 2010

This study describes the design and verification of short range UWB(Ultra Wideband) imaging radar that is able to display high resolution radar image for front area of a UGV(Unmanned Ground Vehicle). This radar can help a UGV to navigate autonomously as it detects and avoids obstacles through foliage. We describe the relationship between bandwidth of transmitting signal and range resolution. A vivaldi antenna is designed and it's radiation pattern and reflection are measured. It is easy to make array antenna because of small size and thin shape. Aperture size of receiving array antenna is determined by azimuth resolution of radar image. The relation of interval of receiving antenna array, image resolution and aliasing of target on a radar image is analyzed. A vector network analyzer is used to obtain the reflected signal and corner reflectors as targets are positioned at grass field. Applicability of the proposed radar to UGV is proved by analysis of image resolution and penetrating capability for grass in the experiment.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.58-65
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• 2011

This paper presents an ASIP (Application-specific Instruction Processor) for motion estimation that employs specific IME instructions and its programmable and reconfigurable hardware architecture for various video codecs, such as H.264/AVC, MPEG4, etc. With the proposed specific instructions and variable point 2D SAD hardware accelerator, it can handle the real-time processing requirement of High Definition (HD) video. With the SAD unit and its parallel operations using pattern information, the proposed IME instructions support not only full search algorithms but also other fast search algorithms. The hardware size is 25.5K gates for each Processing Element Group (PEG) which has 128 SAD Processor Elements (PEs). The proposed ASIP has been verified by the Synopsys Processor Designer and implemented by the Design Compiler using the IBM 90nm process technology. The hardware size is 453K gates for the IME unit and the operating frequency is 188MHz for 1080p@30 frame in real time. The proposed ASIP can reduce the hardware size about 26% and the number of operation cycles about 18%.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.12
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• pp.1083-1090
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• 2015

We designed and manufactured Ka-band SSPA include drive amplifier and high power amplifier MMICs by $0.15{\mu}m$ GaN commercial process. Also, we fabricated main components micro-strip line to WR28 waveguide transition and WR28 wave guide power combiner for Ka-band SSPA. This Ka-band SSPA shows saturated output power 44.2 dBm, power added efficiency 16.6 % and power gain 39.2 dB at 29~31 GHz frequency band.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.12
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• pp.1097-1104
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• 2016

The infrared camera is difficult to satisfy the RE-102 specification of Mil-Std-461. Especially, in the case of UAV electronics, shielded cable is not used, so it is difficult to meet the electromagnetic compatibility standard. In the RE-102 test of the IR camera for UAV, radiated noise exceeding 30 dBuV/m was observed in the range of 50 MHz to 200 MHz. As a result of pcb em scan, peak noise which caused by the harmonic frequency of the digital control signal clock was observed. Radiated noise was reduced by up to 22.9 dBuV/m by applying the spread spectrum clock generator(SSCG) with 3 % down spreading method to the camera control clock.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.2
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• pp.379-385
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• 2015

This paper proposes the hardware architecture of high performance ALF(Adaptive Loop Filter) for efficient filter coefficient estimation. In order to make the original image which has high resolution and high quality into highly compressed image effectively and also, subjective image quality into improved image, the ALF technique of HEVC performs a filtering by estimating filter coefficients using statistical characteristics of image. The proposed ALF hardware architecture is designed with a 2-step pipelined architecture for a reduction in performance cycle by analysing an operation relationship of Cholesky decomposition for the filter coefficient estimation. Also, in the operation process of the Cholesky decomposition, a square root operation is designed to reduce logic area, computation time and computation complexity by using the multiplexer, subtracter and comparator. The proposed hardware architecture is designed using Xilinx ISE 14.3 Vertex-7 XC7VCX485T FPGA device and can support 4K UHD@40fps in real time at a maximum operation frequency of 186MHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.11
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• pp.1713-1719
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• 2022

As the noise canceler with a small processing delay increases the sampling frequency, a better-quality output can be obtained. For a single buffer, processing delay occurs because it is impossible to write new data while the processor is processing the data. When synthesizing with anti-noise and output signal, this processing delay creates additional buffering overhead to match the phase. In this paper, we propose an accelerator structure that minimizes processing delay and increases processing speed by alternately performing read and write operations using the Symmetric Even-Odd-buffer. In addition, we compare the structural differences between the two methods of noise cancellation (Fast Fourier Transform noise cancellation and adaptive Least Mean Square algorithm). As a result, using an Symmetric Even-Odd-buffer the processing delay was reduced by 29.2% compared to a single buffer. The proposed Symmetric Even-Odd-buffer structure has the advantage that it can be applied to various canceling algorithms.

• The Journal of the Convergence on Culture Technology
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• v.9 no.3
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• pp.845-850
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• 2023

In this paper, we propose a method for diagnosing ball bearing vibration using transfer learning. STFT, which can analyze vibration signals in time-frequency, was used as input to CNN to diagnose failures. In order to rapidly learn CNN-based deep artificial neural networks and improve diagnostic performance, we proposed a transfer learning-based deep learning learning technique. For transfer learning, the feature extractor and classifier were selectively learned using a VGG-based image classification model, the data set for learning was publicly available ball bearing vibration data provided by Case Western Reserve University, and performance was evaluated by comparing the proposed method with the existing CNN model. Experimental results not only prove that transfer learning is useful for condition diagnosis in ball bearing vibration data, but also allow other industries to use transfer learning to improve condition diagnosis.