• Journal of the Korean Vacuum Society
• /
• v.17 no.1
• /
• pp.1-8
• /
• 2008

We analyzed the characteristics of water leakage from cooling components of the storage ring in the Pohang Light Source. The water leaks led localized pressure bumps and abnormal pressure changes. The leakage also changed the residual gas compositions depending not only on the position between leakage place to gas analyzer but also on on/off switching of ion pump and electron beam. We found that the residual gas analysis of $CH_4$, CO, NO was useful in determining water leaks.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.38 no.6
• /
• pp.37-47
• /
• 2001

Due to the friction characteristics of pump, cylinder packing and passenger car, in the elevator actuated with hydraulic inverter-fed systems, there exist dead zones, which cannot be controlled by a PID controller. To overcome the drawbacks, in this paper, we propose a new hybrid control scheme, which switches the modes between a sliding mode controller and a PID controller. The proposed hybrid control scheme achieves an improved control performance by using both controllers. We first propose a design method of sliding mode controller for a hydraulic elevator system controlled by inverters, then fellowed by a design method of a hybrid sliding mode control scheme is proposed. The effectiveness of the proposed control scheme are shown by simulation results, which the proposed hybrid control method yields better control performance then the PID controlled scheme, not only in the zero-crossing speed region but also in the overall control region including steady-state region.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.14 no.1
• /
• pp.37-42
• /
• 2021

This paper presents a jitter and phase noise characteristic improved phase-locked loop (PLL) with loop filter voltage detector(LFVD) and frequency voltage converter(FVC). Loop filter output voltage variation is determined through a circuit made of resistor and capacitor. The output signal of a small RC time constant circuit is almost the same as to loop filter output voltage. The output signal of a large RC time constant circuit is the average value of loop filter output voltage and becomes a reference voltage to the added LFVD. The LFVD output controls the current magnitude of sub-charge pump. When the loop filter output voltage increases, LFVD decreases the loop filter output voltage. When the loop filter output voltage decreases, LFVD increases the loop filter output voltage. In addition, FVC also improves the phase noise characteristic by reducing the loop filter output voltage variation. The proposed PLL with LFVD and FVC is designed in a 0.18um CMOS process with 1.8V power voltage. Simulation results show 0.854ps jitter and 30㎲ locking time.

• Journal of the Korean Vacuum Society
• /
• v.12 no.2
• /
• pp.144-149
• /
• 2003

Carbon tips were grown on Si cantilevers by applying an electron beam to them directly with Scanning Electron Microscope. A carbon tip was fabricated by aligning the electron beam directly down the vertical axis of Si cantilever and then irradiating a single spot on the cantilever for a proper time in the dominant atmosphere of residual gases generated by the oil of the diffusion pump. A number of control parameters for SEM, including exposure time, acceleration voltage, emission current, and beam probe current, were allowed to make various aspect ratio feature. The growth of carbon tips was not affected by the surface morphology of substrates. We could acquired the tip whose effective length is 0.5 $\mu\textrm{m}$, bottom diameter is 90 nm and cone half angle $3.5^{\circ}$ The growth technique of the high aspect ratio carbon tips on the tip-free cantilevers is available to reduce the complexities of fabricating sub-micron scale tips on the PZT thin film actuator integrated AFM cantilevers.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
• /
• 2007.11a
• /
• pp.674-678
• /
• 2007

기술수준의 발달로 인해 건물이 대형화 고층화됨에 따라 높은 양정의 펌프를 사용하고 있으며, 배관계통을 대부분 전자식 밸브를 채택하여 입상급수라인의 수충격 현상이 대두되어 수충격 현상제어를 위한 여러 방법들이 시행되고 있다. 본 연구는 수충격 현상을 제어하는 방법 중 수충격 방지기를 이용하여 입상급수라인의 수충격 현상의 제어를 효과적으로 제어할 수 있었다. 향후 본 연구를 계속 진행 시켜나감에 따라 수충격 현상의 제어에 큰 성과를 거둘수 있을 것으로 판단된다.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2005.06a
• /
• pp.1103-1106
• /
• 2005

The research and development for LPLI system to replace the conventional LPG fuel supply system has been processed with a view to enhancing the environmental status and the efficiency for LPG cars. Part of the small sized cars are under commercialization with the LPLI application already. And yet, most of the technologies are relied upon the advanced countries and as part of the application for large scaled engines, many researches are on the increase. This study shows the technology development to make use of LPLI system for those large engines and reviews the controllers, which were manipulated through experiments for their work, reliability and possibility for commercialization.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2004.10a
• /
• pp.618-621
• /
• 2004

Compressors in Large Multi-room air conditioning system are often driven by gas heat pumps. The advantages of GHP are their high level of heating performance and low cost because they use the LNG fuel to drive engine. We developed engine control system. The developed system controls engine speed based on proportional, integral and derivative (PID) method. This controller is designed to eliminate the need for continuous operator attention on engine revolution control. The control system includes 4 spark coil drivers, fuel drivers and relay drivers to make engine's operating more stable. The experiments of control engine revolution of this system are based on the various load conditions.

• Proceedings of the KIEE Conference
• /
• 1999.07f
• /
• pp.2798-2800
• /
• 1999

A new circuit, modified valley fill (MVF) combined with resonant inductor of the self-excited resonant inverter and charge pump capacitors(CPCs), is presented to achieve high PF electronic ballast providing sufficient preheat current to lamp filaments for soft start maintaining low DC bus voltage. The MVF can adjust the valley voltage higher than half the peak line voltage. The CPCs draw the current from the input line to make up the current waveform during the valley interval. The measured PF and THD are 0.99 and 12%, respectively. The lamp current CF is also acceptable in the proposed circuit. The proposed circuit is suitable for implementing cost-effective electronic ballast.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.40 no.3
• /
• pp.19-32
• /
• 2003

In the conventional photorefractive joint transform correlator(PRJTC), the intensity ration of input signal-to-pump beam should be large enough to saturate two-beam coupling transfer function to obtain a desired correlation result. As a result, the signal-to-noise ratio(SNR) of correlation result is decreased in a noisy input image. In this paper, we propose the improved method for increasing the SNR of the PRJTC by using the characteristics of BaTiO$_3$. We stop the energy transfer saturating by low intensity ratio of input beam and realize a short length of effective interaction in BaTiO$_3$ by making large incident angle of the signal beam. So the gain in high frequency area is decreased and the gain in low frequency area comes up to the saturation gain of the beam coupling transfer function. Therefore the SNR is improved in noisy input image and the PRJTC can be easily realized by low intensity ratio of input beam.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.14 no.2
• /
• pp.309-316
• /
• 2019

In this paper, a low-jitter delay-locked loop that compensates for local clock skew is presented. The proposed DLL consists of a phase splitter, a phase detector(PD), a charge pump, a bias generator, a voltage-controlled delay line(VCDL), and a level converter. The VCDL uses self-biased delay cells using current mode logic(CML) to have insensitive characteristics to temperature and supply noises. The phase splitter generates two reference clocks which are used as the differential inputs of the VCDL. The PD uses the only single clock from the phase splitter because the PD in the proposed circuit uses CMOS logic that consumes less power compared to CML. Therefore, the output of the VCDL is also converted to the rail-to-rail signal by the level converter for the PD as well as the local clock distribution circuit. The proposed circuit has been designed with a $0.13-{\mu}m$ CMOS process. A global CLK with a frequency of 1-GHz is externally applied to the circuit. As a result, after about 19 cycles, the proposed DLL is locked at a point that the control voltage is 597.83mV with the jitter of 1.05ps.