• Title/Summary/Keyword: 전압 발생기

Search Result 1,068, Processing Time 0.034 seconds

A Study on the Design and Fabrication of Phase Locked Dielectric Resonance Oscillator (위상고정 유전체 공진형 발진기의 설계 및 제작에 관한 연구)

  • Seo Gon;Park hang-Hyun;Kim Jang-Gu;Choi Byung-Ha
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.42 no.3 s.333
    • /
    • pp.25-32
    • /
    • 2005
  • In this papers, we first, therefore, designed VCO(voltage controlled oscillator) that is composed of the dielectric resonator and the varactor diode, and then designed and fabricated PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The measured results of the fabricated PLDRO at 12.05 [GHz] show the output power is 13.54 [dBm], frequency tuning range approximately +/- 7.5 [MHz], and Power variation over the tuning range less than 0.2 [dB], respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 [dBc/Hz] at 100 [KHz] offset from carrier, and The second harmonic suppression is less than -41.49 [dBc]. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

Surge Protective Device Combined with Varistor and LC Filter on AC Power Circuits (바리스터와 LC필터를 조합한 교류 전원용 서지보호장치)

  • 이복희;이경옥;안창환;이승칠;박정웅
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.11 no.4
    • /
    • pp.109-116
    • /
    • 1997
  • This paper describes the surge protective device combined with varistor and LC low pass filter on AC power circuits. Up to now varistors alone have been used as a surge protective device on AC power circuits, but it gives negative effects on the equipments to be protected due to the steep rise and high remnant voltage. Therefore in this work, for the purpose of improving the cutoff performance of surge protective device on AC power circuits, the hybrid-type surge protective device with varistor and LC filter was designed and prepared. And the experiments for operational characteristics and clamping performance of the surge protective device were carried out with an 1.2/50[$\mu$s] impulse generator. As a result, the proposed surge protective device with the combination of varistors and LC filter can limit the surge voltage to lower value and reduce the value of dV /dt to very small values. Also the attenuation of high-frequency voltages across the output port is effectively provided by LC filter. Therefore this result may be all the more helpful avoiding both damage and upset of electronic systems.

  • PDF

Performance Characteristics of Hypersonic External Compression Inlet Using Isentropic Compression Surface (등엔트로피 압축면을 이용한 극초음속 외부 압축형 흡입구 성능 특성)

  • Kim, Young Jin;Lee, Hyoung Jin
    • Journal of the Korean Society for Aeronautical & Space Sciences
    • /
    • v.50 no.5
    • /
    • pp.297-308
    • /
    • 2022
  • Most air-breathing aircraft operated in the hypersonic region are equipped with a scramjet engine. In a scramjet engine, a shock wave generated at an inlet acts as a compressor for a general gas turbine engine instead, so total pressure loss caused by the shock wave is considered very important. In this study, to minimize total pressure loss, a method of designing an external compression inlet using isentropic compression surface was proposed, and an external compression inlet with 3-deflection angles and Busemann inlet were designed under the same conditions. After that, through computational analysis, the performance characteristics at off-design conditions were compared. Each inlet shape was truncated according to the length of the 3-ramp external compression inlet, and the boundary layer correction was performed. The isentropic external compression inlet showed superior performance at the design point, but under the off-design conditions, its performance was degraded compared to the 3-ramp external compression inlet.

900MHz RFID Passive Tag Frontend Design and Implementation (900MHz 대역 RFID 수동형 태그 전치부 설계 및 구현)

  • Hwang, Ji-Hun;Oh, Jong-Hwa;Kim, Hyun-Woong;Lee, Dong-Gun;Roh, Hyoung-Hwan;Seong, Yeong-Rak;Oh, Ha-Ryoung;Park, Jun-Seok
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.35 no.7B
    • /
    • pp.1081-1090
    • /
    • 2010
  • $0.18{\mu}m$ CMOS UHF RFID tag frontend is presented in this paper. Several key components are highlighted: the voltage multiplier based on the threshold voltage terminated circuit, the demodulator using current mode, and the clock generator. For standard compliance, all designed components are under the EPC Global Class-1 Generation-2 UHF RFID protocol. Backscatter modulation uses the pulse width modulation scheme. Overall performance of the proposed tag chip was verified with the evaluation board. Prototype Tag Chip dimension is neary 0.77mm2 ; According to the simulation results, the reader can successfully interrogate the tag within 1.5m. where the tag consumes the power about $71{\mu}W$.

A 1.88-mW/Gb/s 5-Gb/s Transmitter with Digital Impedance Calibration and Equalizer (디지털 임피던스 보정과 이퀄라이저를 가진 1.88mW/Gb/s 5Gb/s 송신단)

  • Kim, Ho-Seong;Beak, Seung-Wuk;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.20 no.1
    • /
    • pp.110-116
    • /
    • 2016
  • This paper describes 1.2-V 5-Gb/s scalable low voltage signaling(SLVS) differential transmitter(TX) with a digital impedance calibration and equalizer. The proposed transmitter consists of a phase-locked loop(PLL) with 4-phase output clock, a 4-to-1 serializer, a regulator, an output driver, and an equalizer driver for improvement of the signal integrity. A pseudo random bit sequence generator is implemented for a built-in self-test. The proposed SLVS transmitter provides the output differential swing level from 80mV to 500mV. The proposed SLVS transmitter is implemented by using a 65-nm CMOS with a 1.2-V supply. The measured peak-to-peak time jitter of the implemented SLVS TX is about 46.67 ps at the data rate of 5Gb/s. Its power consumption is 1.88 mW/Gb/s.

Electromagnetic Susceptibility Analysis of Phase Noise in VCOs (위상 잡음 이론을 적용한 전압 제어 발진기의 전자파 내성 분석)

  • Hwang, Jisoo;Kim, SoYoung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.26 no.5
    • /
    • pp.492-498
    • /
    • 2015
  • As the integration of circuit components increases steadily, various EMS(Electromagnetic Susceptibility) problems have emerged from integrated circuits and electrical systems. The electromagnetic susceptibility of VCOs(Voltage Controlled Oscillator) is especially critical in RF systems. Therefore, in this paper, through the phase noise theory that models electrical oscillators as linear time variant systems, the EMS characteristics of representative VCO -ring VCO and LC VCO- with 1.2 GHz of reference oscillating frequency are analyzed under the existence of the electromagnetic noise coupled in power supply. An simulation algorithm is developed to extract impulse response function based on the phase noise theory. When there is no supply noise, the magnitude of the jitter of two oscillators were similar to around 2.1 ps, but in presence of supply noise, the jitter was significantly lower in LC VCOs than ring VCOs.

A Study on the Development of Superheater Using High-Frequency Resonant Inverter for Induction Heating (유도가열용 고주파 공진형 인버터를 이용한 과열증기 발생장치 개발에 관한 연구)

  • 신대철;권혁민;김기환;김용주
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.9 no.2
    • /
    • pp.119-125
    • /
    • 2004
  • This paper is described the indirect induction heated boiler system and induction heated hot air producer using the voltage-fed series resonant high-frequency inverter which can operate in the frequency range from 20〔KHz〕 to 50〔KHz〕. A specially designed Induction heater, which is composed of laminated stainless assembly with many tiny holes and interconnected spot welding points between stainless plates, is inserted into the ceramic type vessel with external working coil. This working coil is connected to the resonant inverter. In the induction heater, it's primary heating section creates low-pressure saturated steam and secondary heating section generates heat distribution evaporating fluid from the turbulence fluid which is flowing through the vessel. The operating performances of this unique appliance in next generation and its effectiveness are evaluated and discussed from the practical point of view.

Speed Control of Induction Motor Using Self-Learning Fuzzy Controller (자기학습형 퍼지제어기를 이용한 유도전동기의 속도제어)

  • 박영민;김덕헌;김연충;김재문;원충연
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.3 no.3
    • /
    • pp.173-183
    • /
    • 1998
  • In this paper, an auto-tuning method for fuzzy controller's membership functions based on the neural network is presented. The neural network emulator offers the path which reforms the fuzzy controller's membership functions and fuzzy rule, and the reformed fuzzy controller uses for speed control of induction motor. Thus, in the case of motor parameter variation, the proposed method is superior to a conventional method in the respect of operation time and system performance. 32bit micro-processor DSP(TMS320C31) is used to achieve the high speed calculation of the space voltage vector PWM and to build the self-learning fuzzy control algorithm. Through computer simulation and experimental results, it is confirmed that the proposed method can provide more improved control performance than that PI controller and conventional fuzzy controller.

  • PDF

A DLL-Based Multi-Clock Generator Having Fast-Relocking and Duty-Cycle Correction Scheme for Low Power and High Speed VLSIs (저전력 고속 VLSI를 위한 Fast-Relocking과 Duty-Cycle Correction 구조를 가지는 DLL 기반의 다중 클락 발생기)

  • Hwang Tae-Jin;Yeon Gyu-Sung;Jun Chi-Hoon;Wee Jae-Kyung
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.42 no.2 s.332
    • /
    • pp.23-30
    • /
    • 2005
  • This paper describes a DLL(delay locked loop)-based multi-clock generator having the lower active stand-by power as well as a fast relocking after re-activating the DLL. for low power and high speed VLSI chip. It enables a frequency multiplication using frequency multiplier scheme and produces output clocks with 50:50 duty-ratio regardless of the duty-ratio of system clock. Also, digital control scheme using DAC enables a fast relocking operation after exiting a standby-mode of the clock system which was obtained by storing analog locking information as digital codes in a register block. Also, for a clock multiplication, it has a feed-forward duty correction scheme using multiphase and phase mixing corrects a duty-error of system clock without requiring additional time. In this paper, the proposed DLL-based multi-clock generator can provides a synchronous clock to an external clock for I/O data communications and multiple clocks of slow and high speed operations for various IPs. The proposed DLL-based multi-clock generator was designed by the area of $1796{\mu}m\times654{\mu}m$ using $0.35-{\mu}m$ CMOS process and has $75MHz\~550MHz$ lock-range and maximum multiplication frequency of 800 MHz below 20psec static skew at 2.3v supply voltage.

TID and SEL Testing on PWM-IC Controller of DC/DC Power Buck Converter (DC/DC 강압컨버터의 PWM-IC 제어기의 TID 및 SEL 실험)

  • Lho, Young Hwan;Hwang, Eui Sung;Jeong, Jae-Seong;Han, Changwoon
    • Journal of the Korean Society for Aeronautical & Space Sciences
    • /
    • v.41 no.1
    • /
    • pp.79-84
    • /
    • 2013
  • DC/DC switching power converters are commonly used to generate a regulated DC output voltage with high efficiency. The DC/DC converter is composed of a PWM-IC (pulse width modulation-integrated circuit) controller, a MOSFET (metal-oxide semiconductor field effect transistor), inductor, capacitor, etc. It is shown that the variation of threshold voltage and the offset voltage in the electrical characteristics of PWM-IC increase by radiation effects in TID (Total Ionizing Dose) testing at the low energy ${\gamma}$ rays using $^{60}Co$, and 4 heavy ions applied for SEL (Single Event Latch-up) make the PWM pulse unstable. Also, the output waveform for the given input in the DC/DC converter is observed by the simulation program with integrated circuit emphasis (SPICE). TID testing on PWM-IC is accomplished up to the total dose of 30 krad, and the cross section($cm^2$) versus LET($MeV/mg/cm^2$) in the PWM operation is studied at SEL testing after implementation of the controller board.