• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.5
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• pp.69-76
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• 2004

In this paper, a VCDRO (Voltage Control Dielectric Resonator Oscillator) with low phase noise for X-band application has been designed and fabricated. A low noise and low flicker noise MESFET and a high Q dielectric resonator were selected to obtain good phase noise Performance. Also, a varactor diode having high Q, qualify factor was used to reduce the loading effects and a big Gamma of diode was chosen for linearity of frequency over voltage tuning range. The fabricated circuits was simulated with circuit design tools, ADS to provide the optimum performances. As the measured results of fabricated oscillator, the output power was 5.8 ㏈m at center frequency 12.05㎓ and harmonic suppression -30㏈c, phase noise -114 ㏈c at 100 KHz offset frequency, respectively, and the frequency tuning range as the function of valtage applied to varactor diode was 15.2 MHz and its power variation with frequency was 0.2 ㏈. This oscillator could be available to a local oscillator in X-band.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.2
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• pp.137-144
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• 2008

In this paper, a novel voltage-controlled oscillator(VCO) using the output matching network based on the harmonic control circuit is presented for improving the phase noise property. The phase noise suppression is achieved through the harmonic control circuit having the short impedances for both second-harmonic and third-harmonic components, which has been connected at the output matching network. Also, we have used the microstrip square open loop multiple split-ring resonator(OLMSRR) having the high-Q property to further reduce the phase noise of VCO. Because the output matching network based on the harmonic control circuit has been used for reducing the phase noise property instead of the High-Q resonator, we can obtain the broad tuning range by the low-Q resonator. The phase noise of the proposed VCO using the output matching network based on the harmonic control circuit and the microstrip square OLMSRR has been $-127.5{\sim}126.33$ dBc/Hz @ 100 kHz in the tuning range, $5.744{\sim}5.839$ GHz. Compared with the reference VCO using the output matching network without the harmonic control circuit and the microstrip line resonator, the phase noise property of the proposed VCO has been improved in 26.66 dB.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.869-872
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• 2005

This paper presents a new switchable dual mode VCO(Voltage-Controlled Oscillator). The VCO is efficient in dual mode operation and has self-bias adjustment based on the operation frequencies of 2.4 GHz and 5 GHz. The switching is done using MOS transistors and tuning is done using MOS varactors. It is implemented using TSMC 0.18${\mu}$m CMOS technology. It is powered by 1.8V supply. The measured results showed that the overall tuning range is approximately 13% at 5 GHz and 8% at 2.4 GHz. The measured phase noise is approximately -102 dBc/Hz at 1 MHz offset for 5 GHz and -89 dBc/Hz at 600kHz offset for 2.4 GHz. The VCO showed tail currents of 2mA in 5GHz mode and 2.5mA in 2.4GHz mode from a 1.8 V supply, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.627-634
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• 2010

In this paper, a novel voltage-controlled oscillator(VCO) using the complimentary bifilar archimedean spiral resonator(CBASR) is presented for reducing the phase noise characteristic. A CBASR has compact dimension, a sharp skirt characteristic in stopband, a low insertion loss in passband, and a large coupling coefficient value, which makes a high Q value and improve the phase noise of VCO. The proposed VCO has the oscillation frequency of 2.396~2.502 GHz in the tuning voltage of 0~5 V, the output power of 7.5 dBm and phase noise of -119.16~-120.2 dBc/㎐ at the offset frequency of 100 kHz in tuning range.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.11
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• pp.1075-1081
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• 2004

In this paper, a VCO of a general advance warning system for vehicle's speed limitation in the X-band used in Japan is designed using a small signal scattering coefficient of PHEMT. A varactor diode that wide tuning range and series resistance 0 H is used for designing the VCO and -85 dBc/Hz of phase noise at 10 kHz of offset frequency is obtained by adjusting the reflection coefficient between the micro-strip line and the varactor device which determines transistor's operation voltage and resonant frequency, In addition +4.5 dBm of basic frequency signal output level and -25.6 dEc of the second harmonic constraint are acquired. Sample that produce in this paper could confirm that more excellent special quality appears than existing products in sensitivity.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.591-600
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• 2010

In this paper, three kinds of 24 GHz low-power CMOS cross-coupled voltage controlled oscillators are designed and fabricated for a short-range radar applications using TSMC 0.13 ${\mu}m$ CMOS process. The basic CMOS crosscoupled voltage controlled oscillator is designed for oscillating around a center frequency of 24.1 GHz and subthreshold oscillators are developed for low power operation from it. A double resonant circuit is newly applied to the subthreshold oscillator to improve the problem that parasitic capacitance of large transistors in a subthreshold oscillator can push the oscillation frequency toward lower frequencies. The fabricated chips show the phase noise of -101~-103.5 dBc/Hz at 1 MHz offset, the output power of -11.85~-15.33 dBm and the frequency tuning range of 475~852 MHz. In terms of power consumption, the basic oscillator consumes 5.6 mW, while the subthreshold oscillator does 3.3 mW. The subthreshold oscillator with the double resonant circuit shows relatively lower power consumption and improved phase noise performance while maintaining a comparable frequency tuning range. The subthreshold oscillator with double resonances has FOM of -185.2 dBc based on 1 mW DC power reference, which is an about 3 dB improved result compared with the basic oscillator.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.12
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• pp.1236-1242
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• 2014

In this work, a D-band VCO(Voltage Controlled Oscillator) has been developed in a 65-nm CMOS technology. The circuit was designed based on push-push mechanism. The output oscillation frequency of the fabricated VCO varied from 152.7 GHz to 165.8 GHz, and the measured output power was from -17.3 dBm to -8.7 dBm. A phase noise of -90.9 dBc/Hz is achieved at 10 MHz offset. The chip size of the circuit is $470{\mu}m{\times}360{\mu}m$ including the probing pads.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.2
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• pp.207-212
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• 2012

In this work, a 70/140 GHz dual-band push-push voltage controlled oscillator(VCO) has been developed based on a 0.18-${\mu}m$ SiGe BiCMOS technology. The lower band and the upper band oscillation frequency varied from 67.9 GHz to 76.9 GHz and from 134.3 GHz to 154.5 GHz, respectively, with tuning voltage swept from 0.2 to 2 V. The calibrated maximum output power for each band was -0.55 dBm and -15.45 dBm. The VCO draws DC current of 18 mA from 4 V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.2
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• pp.408-414
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• 2014

This paper proposes a charge-pump phase-locked loop (PLL) with 51-phase output clock of a 125 MHz target frequency. The proposed PLL uses three voltage controlled oscillators (VCOs) to generate 51-phase clock and increase of maximum operating frequency. The 17 delay-cells consists of each VCO, and a resistor averaging scheme which reduces the phase mismatch among 51-phase clock combines three VCOs. The proposed PLL uses a 65 nm 1-poly 9-metal CMOS process with 1.0 V supply. The simulated peak-to-peak 지터 of output clock is 0.82 ps at an operating frequency of 125 MHz. The differential non-linearity (DNL) and integral non-linearity (INL) of the 51-phase output clock are -0.013/+0.012 LSB and -0.033/+0.041 LSB, respectively. The operating frequency range is 15 to 210 MHz. The area and power consumption of the implemented PLL are $580{\times}160{\mu}m^2$ and 3.48 mW, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.3
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• pp.292-298
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• 2011

In this paper, a voltage controlled injection-locked oscillator(VC-ILO) is proposed for wideband applications. From the control of the free-running frequency by a varactor diode, the wide frequency locking range can be obtained for low-level injected signals. The proposed VC-ILO is implemented on an FR-4 substrate with a thickness of 0.8 mm. The free-running frequencies of the oscillator is 2.39~2.52 GHz at the control voltage of 0~5 V. While the frequency locking range of over 50 MHz is presented for -10 dBm injected signal level at a fixed frequency, the locking range of over 90 MHz can be achieved for -30 dBm by controlling the free-running frequency.