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An Experimental Study on the Engineering Properties of Concrete according to W/C and Replacement Ratio of Bottom Ash (물-시멘트비 및 바텀애쉬 대체율에 따른 콘크리트의 공학적 특성에 관한 실험적 연구)

  • Choi, Se-Jin;Jeong, Yong;Oh, Bok-Jin;Kim, Moo-Han
    • Journal of the Korea Concrete Institute
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    • v.15 no.6
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    • pp.840-847
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    • 2003
  • Recently, the coal-ash production has been increased by increase of consumption of electric power. So it is important to secure a reclaimed land and treatment utility for coal-ash. This is an experimental study to compare and analyze the engineering properties of concrete according to W/C and replacement ratio of bottom ash. For this purpose, the mix proportions of concrete according to W/C(40, 50, 60%) and replacement ratio of bottom ash(0, 10, 20, 35, 50%) were established, and then tested for slump, chloride content, setting time, bleeding content, compressive strength. Also the durability test of concrete with W/E 60% was performed. According to test results, it was found that the bleeding content of concrete decreased as the replacement ratio of bottom ash increased. And the chloride content of concrete using the bottom ash increased as the replacement ratio of bottom ash increased, but it is satisfied with the chloride content of fresh concrete $0.30kg/m^3$ below("concrete standard specification" regulation value). The compressive strength of concrete using the bottom ash was similar to that of BA0 concrete after 28 days of curing and the carbonation depth of concrete was increased according to increase of the replacement ratio of bottom ash.

The Early Write Back Scheme For Write-Back Cache (라이트 백 캐쉬를 위한 빠른 라이트 백 기법)

  • Chung, Young-Jin;Lee, Kil-Whan;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.11
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    • pp.101-109
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    • 2009
  • Generally, depth cache and pixel cache of 3D graphics are designed by using write-back scheme for efficient use of memory bandwidth. Also, there are write after read operations of same address or only write operations are occurred frequently in 3D graphics cache. If a cache miss is detected, an access to the external memory for write back operation and another access to the memory for handling the cache miss are operated simultaneously. So on frequent cache miss situations, as the memory access bandwidth limited, the access time of the external memory will be increased due to memory bottleneck problem. As a result, the total performance of the processor or the IP will be decreased, also the problem will increase peak power consumption. So in this paper, we proposed a novel early write back cache architecture so as to solve the problems issued above. The proposed architecture controls the point when to access the external memory as to copy the valid data block. And this architecture can improve the cache performance with same hit ratio and same capacity cache. As a result, the proposed architecture can solve the memory bottleneck problem by preventing intensive memory accesses. We have evaluated the new proposed architecture on 3D graphics z cache and pixel cache on a SoC environment where ARM11, 3D graphic accelerator and various IPs are embedded. The simulation results indicated that there were maximum 75% of performance increase when using various simulation vectors.

Bicycle Riding-State Recognition Using 3-Axis Accelerometer (3축 가속도센서를 이용한 자전거의 주행 상황 인식 기술 개발)

  • Choi, Jung-Hwan;Yang, Yoon-Seok;Ru, Mun-Ho
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.48 no.6
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    • pp.63-70
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    • 2011
  • A bicycle is different from vehicles in the structure that a rider is fully exposed to the surrounding environment. Therefore, it needs to make use of prior information about local weather, air quality, trail road condition. Moreover, since it depends on human power for moving, it should acquire route property such as hill slope, winding, and road surface to improve its efficiency in everyday use. Recent mobile applications which are to be used during bicycle riding let us aware of the necessity of development of intelligent bicycles. This study aims to develop a riding state (up-hill, down-hill, accelerating, braking) recognition algorithm using a low-power wrist watch type embedded system which has 3-axis accelerometer and wireless communication capability. The developed algorithm was applied to 19 experimental riding data and showed more than 95% of correct recognition over 83.3% of the total dataset. The altitude and temperature sensor also in the embedded system mounted on the bicycle is being used to improve the accuracy of the algorithm. The developed riding state recognition algorithm is expected to be a platform technology for intelligent bicycle interface system.

Design and Implementation of u-Healthcare SensorGrid Gateway for connecting Sensor Network and Grid Network (센서 네트워크와 그리드 네트워크와의 연동을 위한 u-Healthcare 센서그리드 게이트웨이 설계 및 구현)

  • Oh, Se-Jin;Lee, Chae-Woo
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.4
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    • pp.64-72
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    • 2008
  • Researchers nowadays are trying to implement u-Healthcare (ubiquitous Healthcare) systems for real-time monitoring and analysis of patients' status through a low-cost and low-power wireless sensor network. u-Healthcare system has an aim to provide reliable and fast medical services for patients regardless of time and space by transmitting to doctors a large quantity of vital signs collected from sensor networks. Existing u-Healthcare systems can merely monitor patients' health status. However, it is not easy to derive physiologically meaningful results by analyzing rapidly vital signs through the existing u-Healthcare systems. We introduce a Grid computing technology for deriving the results by analyzing rapidly the vital signs collected from the sensor network. Since both sensor network and Grid computing use different protocols, a gateway is needed. In addition, we also need to construct a gateway which includes the functions such as an efficient management and control of the sensor network, real-time monitoring of the vital signs and communication services related to the Grid network for providing u-Healthcare services effectively. In this paper, to build an advanced u-Healthcare system by using these two technologies most efficiently, we design and present the results to implement a SensorGrid gateway which connects transparently the sensor network and the grid network.

The Post Annealing Effect of Organic Thin Film Solar Cells with P3HT:PCBM Active Layer (P3HT:PCBM 활성층을 갖는 유기 박막태양전지의 후속 열처리 효과)

  • Jang, Seong-Kyu;Gong, Su-Cheol;Chang, Ho-Jung
    • Journal of the Microelectronics and Packaging Society
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    • v.17 no.2
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    • pp.63-67
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    • 2010
  • The organic solar cells with Glass/ITO/PEDOT:PSS/P3HT:PCBM/Al structure were fabricated using regioregular poly (3-hexylthiophene) (P3HT) polymer:(6,6)- phenyl $C_{61}$-butyric acid methyl ester (PCBM) fullerene polymer as the bulk hetero-junction layer. The P3HT and PCBM as the electron donor and acceptor materials were spin casted on the indium tin oxide (ITO) coated glass substrates. The optimum mixing concentration ratio of photovoltaic layer was found to be P3HT:PCBM = 4:4 in wt%, indicating that the short circuit current density ($J_{SC}$), open circuit voltage ($V_{OC}$), fill factor (FF) and power conversion efficiency (PCE) values were about 4.7 $mA/cm^2$, 0.48 V, 43.1% and 0.97%, respectively. To investigate the effects of the post annealing treatment, as prepared organic solar cells were post annealed at the treatment time range from 5min to 20min at $150^{\circ}C$. $J_{SC}$ and $V_{OC}$ increased with increasing the post annealing time from 5min to 15min, which may be originated from the improvement of the light absorption coefficient of P3HT and improved ohmic contact between photo voltaic layer and Al electrode. The maximum $J_{SC},\;V_{OC}$, FF and PCE values of organic solar cell, which was post annealed for 15min at $150^{\circ}C$, were found to be about 7.8 $mA/cm^2$, 0.55 V, 47% and 2.0%, respectively.

PAPR Reduction Method for the Nonlinear Distortion in the Multicode CDMA System (멀티코드 CDMA 시스템에서 비선형 왜곡에 대처하는 PAPR 저감 기법)

  • Kim Sang-Woo;Kim Namil;Kim Sun-Ae;Suh Jae-Won;Ryu Heung-Cyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.12 s.103
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    • pp.1171-1178
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    • 2005
  • Multi-code code division multiple access(MC-CDMA) has been proposed for providing the various service rates with different quality of service requirement by assigning multiple codes and increasing the capacity. However, it suffers from the serious problem of high peak to average power ratio(PAPR). So, it requires large input back-off, which causes poor power consumption in high power amplifier(HPA). In this paper, we propose a new method that can reduce PAPR efficiently by constraint codes based on the opposite correlation to the incoming information data in MC-CDMA. PAPR reduction depends on the length and indices of constraint codes in MC-CDMA system. There is a trade-off between PAPR reduction and the length of constraint codes. From the simulation results, we also investigate the BER improvement in AWGN channel with HPA. The simulation results show that BER performance can be similar with linear amplifier in two cases: 1) Using exact constraint codes without input back-off and 2) a few constraint codes with small input back-off.

Design of Binary Constant Envelope System using the Pre-Coding Scheme in the Multi-User CDMA Communication System (다중 사용자 CDMA 통신 시스템에서 프리코딩 기법을 사용한 2진 정진폭 시스템 설계)

  • 김상우;유흥균;정순기;이상태
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.5
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    • pp.486-492
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    • 2004
  • In this paper, we newly propose the binary CA-CDMA(constant amplitude CDMA) system using pre-coding method to solve the high PAPR problem caused by multi-user signal transmission in the CDMA system. 4-user CA-CDMA, the basis of proposed binary CA-CDMA system, makes binary output signal for 4 input users. It produces the output of binary(${\pm}$2) amplitude by using a parity signal resulting from the XOR operation of 4 users data. Another sub-channel or more bandwidth is not necessary because it is transmitted together with user data and can be easily recovered in the receiver. The extension of the number of users can be possible by the simple repetition of the basic binary 4-user CA-CDMA. For example, binary 16-user CA-CDMA is made easily by allocating the four 4-user CA-CDMA systems in parallel and leading the four outputs to the fifth 4-user CA-CDMA system as input, because the output signal of each 4-user CA-CDMA is also binary. By the same extension procedure, binary 64 and 256-user CA-CDMA systems can be made with the constant amplitude. As a result, the code rate of this proposed CA-CDMA system is just 1 and binary CA-CDMA does not change the transmission rate with the constant output signal(PAPR = 0 ㏈). Therefore, the power efficiency of the HPA can be maximized without the nonlinear distortion. From the simulation results, it is verified that the conventional CDMA system has multi-level output signal, but the proposed binary CA-CDMA system always produces binary output. And it is also found that the BER of conventional CDMA system is increased by nonlinear HPA, but the BER of proposed binary CA-CDMA system is not changed.

마이크로파 응용을 위한 고온초전도 필터 서브-시스템

  • 강광용;김현탁;곽민환
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.3
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    • pp.20-40
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    • 2003
  • Since unloaded Q-value of a high-temperature superconductor(HTS) filter is very high, a bandpass filter(BPF) and a lowpass filter(LPF) with an increase of pole numbers can be fabricated without an increase of an insertion loss(IL) ; recently a 70-pole BPF is developed in USA. They have an abrupt skirt property and an excellent attenuation level for out-of band. Moreover, they can be miniaturized when lumped element resonators or the slow-wave characteristic are used. Technology of fabricating a HTS epitaxial film as well as a film of a 4 inch area also makes the planar type filter with a various structure and an enhanced power handling capability possible. Recently, the HTS filter subsystems composed of a planar-type HTS filters, a GaAs-based LNA and a mini-cryocooler are developed. The extended receiver front- end subsystems for mobile radio communications decrease the noise-figure level of the communication system and the frequency interference interacted adjacent bands, and increase the efficiency of frequency and the capacity of communication system. In this paper, theory for developing the HTS filter, its kinds, its design rules, its characteristics are reviewed. The feature of the research and market trends related to the HTS filter systems for the receiver front-end subsystem of mobile base station are surveyed.

Influences and Compensation of Phase Noise and IQ Imbalance in Multiband DFT-S OFDM System for the Spectrum Aggregation (스펙트럼 집성을 위한 멀티 밴드 DFT-S OFDM 시스템에서 직교 불균형과 위상 잡음의 영향 분석 및 보상)

  • Ryu, Sang-Burm;Ryu, Heung-Gyoon;Choi, Jin-Kyu;Kim, Jin-Up
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.11
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    • pp.1275-1284
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    • 2010
  • 100 MHz bandwidth and 1 Gbit/s data speed are needed in LTE-advanced for the next generation mobile communication system. Therefore, spectrum aggregation method has been studied recently to extend usable frequency bands. Also bandwidth utilization is increased since vacant frequencies are used to communicate. However, transceiver structure requires the digital RF and SDR. Therefore, frequency synthesizer and PA must operate over wide-bandwidth and RF impairments also increases in transceiver. Uplink of LTE advanced uses DFT-S OFDM using plural power amplifier. The effect of ICI increases in frequency domain of receiver due to phase noise and IQ imbalance. In this paper, we analyze influences of ICI in frequency domain of receiver considering phase noise and IQ imbalance in multiband system. Also, we separate phase noise and IQ imbalance effect from channel response in frequency domain of uplink system. And we propose a method to estimate the channel exactly and to compensate IQ imbalance and phase noise. Simulation result shows that the proposed method achieves the 2 dB performance gain of BER=$10^{-4}$.

Analysis and Application of Compact Planar Multi-Loop Self-Resonant Coil of High Quality Factor with Coaxial Cross Section (고품질 계수를 갖는 소형 평판형 동축 단면 다중 루프 자기 공진 코일 해석 및 응용)

  • Son, Hyeon-Chang;Kim, Jinwook;Kim, Do-Hyeon;Kim, Kwan-Ho;Park, Young-Jin
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.4
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    • pp.466-473
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    • 2013
  • In this paper, a compact planar multi-loop self-resonant coil of high quality factor with a coaxial cross section is proposed for effective wireless charging. The proposed coil has high Q-factor and a resonant frequency of a coil can be easily controlled by adjusting distributed capacitance. For designing the coil, a self-inductance and a distributed capacitance are calculated theoretically. The self-inductance is calculated from the sum of the mutual energies between small circular loops that are made by dividing the cross section of the coil. To verify its properties and calculation results, the self-resonant coils are fabricated by using a coaxial cable with characteristic impedance of $50{\Omega}$. The measured frequencies are very consistent with the calculated ones. In addition, the resonant frequency can be adjusted slightly by the tuning parameter ${\gamma}$. The resonant coils are applied to a tablet PC, the Q-factors of the Tx and Rx resonant coils are 282 and 135, respectively. As a result of measurement when height between the two resonant coils is 4.4 cm, the power transfer efficiency is more than 80 % within a radius of 5 cm.