• Title/Summary/Keyword: 전력 모드 전환

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Operation of Brushless DC Motor without a Rotor Magnet Position Sensor (회전자극 위치센서 없는 Brushless DC전동기의 운전에 관한 연구)

  • 서석훈;엄우용
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.36T no.3
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    • pp.50-55
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    • 1999
  • Brushless DC Motor(BLDCM) has high efficiency. But this type of motor needs a rotor sensor which complicates the motor configuration. Rotor position sensor degrades system reliability in the severe environmental condition. In this paper, we study a controller which permits the determination of the rotor position by the back EMF to eliminate the rotor position sensor Also, since the back EMF is zero at standstill, a starting technique which permits the starting of an asynchronous motor without a sensor is described. The controller is implemented using microcontroller for minimal external component.

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Implementation of Signal Processing Algorithms for an FMCW Radar Altimeter (FMCW 전파고도계의 신호처리 알고리즘 구현)

  • Choi, Jae-Hyun;Jang, Jong-Hun;Lee, Jae-Hwan;Roh, Jin-Eep
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.6
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    • pp.555-563
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    • 2015
  • This paper presents signal processing algorithms of a frequency-modulated continuous-wave(FMCW) radar altimeter and provides a practical assessment technique. The radar altimeter is initially operated in search mode, when the radar altimeter detects a valid altitude, search mode is switched to track mode and a altitude being tracked is displayed. The sweep bandwidth in each mode is a function of altitude to narrow the beat frequency bandwidth. In addition, transmit power and receiver gain in each mode are controlled to compensate for the dynamic range of wide altitude range. To assess more realistic operation, the radar altimeter was tested using the crane setup. The crane test demonstrated that signal processing algorithms described in this paper resulted in a reduced measurement error rate.

A Studies for Sequential Mode Change Control Algorithm of the Parallel Dual Converter of Using Thyristor for Supplying the Urban Railway DC Power (도시철도의 직류전력 공급을 위한 사이리스터를 사용한 병렬 듀얼 컨버터의 순차적 모드 전환 제어 알고리즘에 대한 연구)

  • Han, Sung-Woo;Kim, Sung-An;Cho, Yun-Hyun;Byun, Gi-Sig
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.3
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    • pp.511-519
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    • 2016
  • This paper is proposed control algorithm for the using thyristor of the parallel dual converter for Urban railway power supply in order to return the regenerative power generated by regenerative braking in urban railway train. Conventional control algorithm of Thyristor dual converter for urban railway power supply has voltage variation within a control range of hysteresis band. The purposed control algorithm of the parallel thyristor dual converter is to maintain a constant voltage without voltage variation in accordance with variable load through the Sequential mode change. And the control algorithm need calculating optimum initial firing angle to consider magnitude of the load current slope. For this purpose, Proposed algorithm for sequential conversion mode of the dual converter was verified by applying for the simulation.

The Control Method of In-Wheel PMSM for Electric Scooter using Speed Observer (속도 관측기를 이용한 전기스쿠터용 IN-WHEEL 영구자석 동기 전동기의 제어 방법)

  • Son, Tae-Sik;Lee, Yong-Kyun;Kim, Hag-Wone;Cho, Kwan-Yuhl;Mok, Hyung-Soo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.2
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    • pp.130-136
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    • 2011
  • This paper presents the torque control algorithm of a permanent magnet synchronous motor(PMSM) for an electric scooter. The volume of the in-wheel type motor is restricted due to the complicated mechanical structure in wheel of an electric scooter, so the hall sensors instead of resolver and encoder for the rotor position sensors are installed. In this paper, the rotor speed and position are estimated from the speed estimator for vector control of a PMSM with hall sensors. The motor starts to rotate at standstill in BLDC mode with 120 degree conduction. After start up, the operating mode is changed to the vector control with maximum torque per ampere(MTPA) operation at low speeds and flux weakening control at high speeds. The performance of the proposed control algorithm is verified through the experiment in the electric scooter.

Development of Driving System for Railway Vehicle using Vector Control (백터제어를 적용한 전동차 구동 시스템 개발)

  • 김상훈;배본호;설승기
    • The Transactions of the Korean Institute of Power Electronics
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    • v.6 no.2
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    • pp.125-131
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    • 2001
  • This paper presents a application of vector control strategy to 1.2MVA traction drive for railway vehicle. The vector control required the control of the phase and amplitude of output voltage vector. But in case of traction system for railway vehicle, the one-pulse mode is used at high speed region in order to utilize the link voltage fully. So it is impossible to control the flux and torque axis current instantaneously and independently in the region. So this paper proposes a mixed control algorithm, where the vector control strategy at low speed region and slip-frequency control strategy at high speed region is used. And precise switching technique between the two different control strategy is proposed. The proposed strategy is verified by experimental results with a 1.2MVA traction drive system with four 210kW induction motors.

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Scheduling Algorithms and Queueing Response Time Analysis of the UNIX Operating System (UNIX 운영체제에서의 스케줄링 법칙과 큐잉응답 시간 분석)

  • Im, Jong-Seol
    • The Transactions of the Korea Information Processing Society
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    • v.1 no.3
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    • pp.367-379
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    • 1994
  • This paper describes scheduling algorithms of the UNIX operating system and shows an analytical approach to approximate the average conditional response time for a process in the UNIX operating system. The average conditional response time is the average time between the submittal of a process requiring a certain amount of the CPU time and the completion of the process. The process scheduling algorithms in thr UNIX system are based on the priority service disciplines. That is, the behavior of a process is governed by the UNIX process schuduling algorithms that (ⅰ) the time-shared computer usage is obtained by allotting each request a quantum until it completes its required CPU time, (ⅱ) the nonpreemptive switching in system mode and the preemptive switching in user mode are applied to determine the quantum, (ⅲ) the first-come-first-serve discipline is applied within the same priority level, and (ⅳ) after completing an allotted quantum the process is placed at the end of either the runnable queue corresponding to its priority or the disk queue where it sleeps. These process scheduling algorithms create the round-robin effect in user mode. Using the round-robin effect and the preemptive switching, we approximate a process delay in user mode. Using the nonpreemptive switching, we approximate a process delay in system mode. We also consider a process delay due to the disk input and output operations. The average conditional response time is then obtained by approximating the total process delay. The results show an excellent response time for the processes requiring system time at the expense of the processes requiring user time.

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A Design of PLL and Spread Spectrum Clock Generator for 2.7Gbps/1.62Gbps DisplayPort Transmitter (2.7Gbps/1.62Gbps DisplayPort 송신기용 PLL 및 확산대역 클록 발생기의 설계)

  • Kim, Young-Shin;Kim, Seong-Geun;Pu, Young-Gun;Hur, Jeong;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.2
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    • pp.21-31
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    • 2010
  • This paper presents a design of PLL and SSCG for reducing the EMI effect at the electronic machinery and tools for DisplayPort application. This system is composed of the essential element of PLL and Charge-Pump2 and Reference Clock Divider to implement the SSCG operation. In this paper, 270MHz/162MHz dual-mode PLL that can provide 10-phase and 1.35GHz/810MHz PLL that can reduce the jitter are designed for 2.7Gbps/162Gbps DisplayPort application. The jitter can be reduced drastically by combining 270MHz/162MHz PLL with 2-stage 5 to 1 serializer and 1.35GHz PLL with 2 to 1 serializer. This paper propose the frequency divider topology which can share the divider between modes and guarantee the 50% duty ratio. And, the output current mismatch can be reduced by using the proposed charge-pump topology. It is implemented using 0.13 um CMOS process and die areas of 270MHz/162MHz PLL and 1.35GHz/810MHz PLL are $650um\;{\times}\;500um$ and $600um\;{\times}\;500um$, respectively. The VCO tuning range of 270 MHz/162 MHz PLL is 330 MHz and the phase noise is -114 dBc/Hz at 1 MHz offset. The measured SSCG down spread amplitude is 0.5% and modulation frequency is 31kHz. The total power consumption is 48mW.