• Smart Media Journal
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• v.6 no.3
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• pp.68-74
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• 2017

Big data processing processes various types of data such as files, images, and video to solve problems and provide insightful useful information. Currently, various platforms are used for big data processing, but many organizations and enterprises are using Hadoop for big data processing due to the simplicity, productivity, scalability, and fault tolerance of Hadoop. In addition, Hadoop can build clusters on various hardware platforms and handle big data by dividing into a name node (master) and a data node (slave). In this paper, we use a fully distributed mode used by actual institutions and companies as an operation mode. We have constructed a Hadoop cluster using a low-power and low-cost single board for smooth experiment. The performance analysis of Name node is compared through the same data processing using single board and laptop as name nodes. Analysis of influence by number of data nodes increases the number of data nodes by two times from the number of existing clusters. The effect of the above experiment was analyzed.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.4
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• pp.207-213
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• 2006

This paper presents the design and implementation of a video processor for the device of need TV-OUT function. The designed video processor satisfies the standard conditions of ITU-R(International Telecommunication Union-Radiocommunication) BT.470. Also, in order to apply various digital device, we concentrate upon hardware complexity. ITU-R BT.470 can be classified as NTSC, PAL or SECAM. NTSC and PAL use QAM(Quardarature Amplitude Modulation) to transmit color difference signals and SECAM uses FM(Frequency Modulation). FM must have antic-cloche filter but filter recommended by ITU-R BT.470 is not easy to design due to sharpness of the frequency response. So this paper proposes that the special quality of anti-cloche filter is transformed easy to design and the modulation method is modified to be identical with the result required at standard. The processor can control power consumption by output mode to apply portable digital devices. The proposed processor is experimentally demonstrated with ALTERA FPGA APEX20KE EP20K1000EBC652-3 device and SAMSUNG LCD-TV.

• Journal of Korea Society of Industrial Information Systems
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• v.27 no.6
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• pp.59-68
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• 2022

We propose the vehicle maintenance support system to alarm consumable replacement reminders to the vehicle owner. Since the delayed replacement of the consumables makes the condition of the vehicle worse, it is crucial to replace consumables in a recommended period. The vehicle maintenance support system alarms the replacement time, which is set by the vehicle owner, based on the mileage of the installed vehicle. It integrates speed information acquired from the Controller Area Network interface for communication between Electronic Control Unit and instrument panel, exposed at the On Board Diagnostics-II port, to calculate the vehicle mileage. By this, there is no additional wiring required for the system. We verify the system has only 0.28% error by comparing the mileage on the system with the instrument cluster on the vehicle. It automatically enters low-power mode consuming 15mW, which is a negligible amount for the typical conditions of the car, to prevent the vehicle battery from discharging when the ignition is off.

• Journal of IKEEE
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• v.12 no.3
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• pp.176-183
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• 2008

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.

• Proceedings of the Korean Information Science Society Conference
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• 2002.10e
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• pp.274-276
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• 2002

Ad Hoc망은 전형적인 무선 네트워킹과는 다른 새로운 무선 네트워킹 파라다임으로써 기존 유선 망의 하부 구조에 의존하지 않고 이동 호스트들로만 구성된 네트워크이다. Ad Hoc망에서 통신을 하기 위해서는 출발지 노드에서 목적지 노드까지 데이터 전송을 위한 라우팅에 관한 문제이다. Ad Hoc망에서는 모든 단말기의 위치변화가 가능하기 때문에 경로설정에 어려움이 따른다. 노드간에 정보를 보내고자 할 때 노드가 인접한 상태가 아니면 정보를 직접 보낼 수 없고 여러 중간 노드들을 거쳐서 정보를 보내는 다중-홉 라우팅 방식을 사용해야 한다. 따라서 중간 노드들은 패킷 라우터의 역할을 해야하는데 무선 통신자체가 좁은 대역폭과 한정된 채널을 가지고 전송 범위가 제한되는 문제가 있다. 또한 노드자체의 이동성과 전력 소모 등으로 인한 이탈은 망 위상을 수시로 변화시키므로 노드간에 정보를 전송하는데 가장 좋은 경로는 수시로 변경될 수 있으므로 많은 어려움이 따르게 된다. 본 논문에서는 이러한 문제의 해결방안으로 경로유지 과정에서 Ad Hoc망 내의 노드들은 이동성의 특성으로 인해 현재 사용되는 경로 보다 더 짧고 효율적인 경로가 발생하고 중간 노드가 이동 될 때 새로운 경로로 갱신하여 솔기없는 최적의 경로를 유지할 수 있는 방법을 제안한다. 제안 방법은 ZRP의 IERP에서 감청모드를 통하여 사용중인 경로보다 최적의 경로를 감지하여 새로운 경로로 갱신하는 방법과 중간 노드가 이동하여 경로가 깨진 경우 부분적으로 경로를 복구하는 방법을 제시하여 항상 최적화된 경로를 유지함으로써 Ad Hoc망의 위상변화에 대한 적응성을 높일 수 있도록 한다.기반으로 하는 교육용 애플리케이션 개발의 용이성의 증대를 기대할 수 있으며, 모델의 재사용성을 보장할 수 있다. 제안한다.수행하였다. 분석에서는 제품의 효율성뿐만 아니라 보안성을 중요하게 생각하였으며, 앞으로 보안 관련 소프트웨어 개발에 사용될 수 있는 도구들이 가이드 라인에 대한 정보를 제공한다.용할 수 있는지 세부 설계를 제시한다.다.으로서 hemicellulose구조가 polyuronic acid의 형태인 것으로 사료된다. 추출획분의 구성단당은 여러 곡물연구의 보고와 유사하게 glucose, arabinose, xylose 함량이 대체로 높게 나타났다. 점미가 수가용성분에서 goucose대비 용출함량이 고르게 나타나는 경향을 보였고 흑미는 알칼리가용분에서 glucose가 상당량(0.68%) 포함되고 있음을 보여주었고 arabinose(0.68%), xylose(0.05%)도 다른 종류에 비해서 다량 함유한 것으로 나타났다. 흑미는 총식이섬유 함량이 높고 pectic substances, hemicellulose, uronic acid 함량이 높아서 콜레스테롤 저하 등의 효과가 기대되며 고섬유식품으로서 조리 특성 연구가 필요한 것으로 사료된다.리하였다. 얻어진 소견(所見)은 다음과 같았다. 1. 모년령(母年齡), 임신회수(姙娠回數), 임신기간(姙娠其間), 출산시체중등(出産時體重等)의 제요인(諸要因)은 주산기사망(周産基死亡)에 대(對)하여 통계적(統計的)으로 유의(有意)한 영향을 미치고 있어 $25{\sim}29$세(歲)의 연령군에서, 2번째 임신과 2번째의 출산에서 그리고 만삭의 임신 기간에, 출산시체중(出産時體重

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.10
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• pp.90-99
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• 2009

In this paper, we proposed the new class-E frequency multiplier design that include the highest efficient characteristics. The proposed frequency multiplier is designed for 5.8[GHz] output using the frequency multiplier about 2.9[GHz] input signal. And studying in this paper is for the design and the implementation of the class E frequency multiplier. For the result, the maximum highest efficient characteristics 32[%] which is with output power 24.5[dBm] and 8.5[dB], is shown with frequency multiplier for the 2.9/5.8[GHz] class E. And we applied the linear method to the implemented class E frequency multiplier. As a result, the output spectrum for the linear is upgrade to 12[dB], 12[dB], 13[dB] of the ACPR characteristics on the +11[MHz], +20[MHz], +30[MHz] offset frequency in the center frequency. The result is satisfied with the 3.83[%] of the lineared EVM for the 64-QAM modulated method with the 54[Mbps] transmission velocity. In this paper, we show that the good compensation result of the linearity and the efficiency through the digital pre-linear method of the distortion with the frequency multiplier. Therefore, we suggested the frequency multiplier method are applying to WLAN, cellular, PCS, WCDMA, and etc.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.9A
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• pp.702-709
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• 2003

In this paper, we propose an efficient and QoS-aware MAC scheduling algorithm for Bluetooth, which considers both throughput and delay performance of each Master-Slave pair in scheduling decisions, and thus, attempts to maximize overall performance. The proposed algorithm, MTDPP (Modified Throughput-Delay Priority Policy), makes up for the drawbacks of T-D PP (Throughput-Delay Priority Policy) proposed in [6] and improves the performance. Since Bluetooth employs a master-driven TDD based scheduling algorithm, which is basically operated with the Round Robin policy, many slots may be wasted by POLL or NULL packets when there is no data waiting for transmission in queues. To overcome this link wastage problem, several algorithms have been proposed. Among them, queue state-based priority policy and low power mode-based algorithm can perform with high throughput and reasonable fairness. However, their performances may depend on traffic characteristics, i.e., static or dynamic, and they require additional computational and signaling overheads. In order to tackle such problems, we propose a new scheduling algorithm. Performance of our proposed algorithm is evaluated with respect to throughput and delay. Simulation results show that overall performances can be improved by selecting suitable parameters of our algorithm.

• The Bulletin of The Korean Astronomical Society
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• v.39 no.2
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• pp.106-106
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• 2014

SIGMA (Scientific cubesat with Instrument for Global Magnetic field and rAdiation)는 근 지구공간에서 우주방사선량 측정과 자기장 변화 검출의 과학적 목적과 교육적 목적을 가지고 개발하고 있는 초소형 큐브위성이다. $100mm{\times}100mm{\times}340.5mm$의 크기로 약 3.6 kg의 무게를 가지며, 탑재체는 방사선에 대하여 인체와 동일한 산란 흡수 특성을 가진 Tissue Equivalent Proportional Counter (TEPC)와 자기장 측정을 위한 Magnetometer (Mag)이다. 위성체는 구조계, 자세제어계, 전력계, 명령 및 데이터처리계, 통신계로 구성되어있다. 구조계는 위성의 뼈대인 Chassis와 Mag deployer로 이루어져있고, 위성의 안정적인 자세유지를 목적으로 Attitude Control System (ACS) Board와 Torque Coil이 자세제어계로 구성된다. 전력의 생산과 공급 및 충전은 태양전지판과 Electrical Power System (EPS), 리튬 배터리로 구성된 전력계에서 이뤄지며, 명령 및 데이터처리계는 On Board Computer (OBC)와 Instrument Interface board (IIB)를 중심으로 서브시스템의 명령체계와 데이터처리를 다룬다. 통신계는 Uplink인 VHF 안테나와 Downlink인 UHF, S-band 안테나로 구성되며 지상과 명령을 송수신한다. SIGMA는 타임인터럽트 기능을 활용한 Flight Software (FSW)로 운용되며 임무에 따른 6가지 모드의 시나리오로 위성을 운용한다. 이에 SIGMA의 개발과 테스트 결과를 소개한다. 본 큐브위성 개발기술을 바탕으로 향후 천문관측용 위성에도 활용할 예정이다.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.36 no.5
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• pp.487-493
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• 2012

We present interferometric modulators that reproduce RGB colors through the selective actuation of mechanically coupled mirror arrays having identical air gaps. The conventional transmittive interferometric modulators need additional backlights, which leads to high power consumption. The previous reflective interferometric modulators using ambient lights need three different air gaps for reproducing the three RGB colors, thus giving rise to process complexity. For process simplicity, we propose the use of reflective interferometric modulators that are capable of producing green, blue, red, and black colors with the aid of mechanically coupled mirrors with identical air gaps. In an experimental study, the present interferometric modulators reproduce green, blue, and red colors at the switching modes (000), (010), and (101). The spectrum peaks for the colors are measured at the wavelengths $511{\pm}5nm$, $478{\pm}3nm$, and $644{\pm}9nm$, respectively, with the bandwidths being $60{\pm}1nm$, $45{\pm}2nm$, and $105{\pm}4nm$, respectively; further, the maximum intensities of the colors are $77{\pm}5%$, $73{\pm}2%$, and $81{\pm}5%$, respectively. The black spectrum is measured below the intensity of $27{\pm}0%$. Thus, we experimentally demonstrate the color reproduction capability of interferometric modulators fabricated by using a simple process.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.47 no.2
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• pp.25-34
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• 2010

This paper proposed a high-speed voltage-controlled ring-oscillator(VCRO) using a frequency doubling technique. The design of the proposed oscillator has been based on TSMC 0.18um 1.8V CMOS technology. The frequency doubling technique is achieved by AND-OR operations with 4 signals which have $90^{\circ}$ phase difference one another in one cycle. The proposed technique has been implemented using a 4-stage differential oscillator compose of differential latched inverters and NAND gates for AND and OR operations. The differential ring-oscillator can generate 4 output signals, which are $90^{\circ}$ out-of-phase one another, with low phase noise. The ANP-OR operations needed in the proposed technique are implemented using NAND gates, which is more area-efficient and provides faster switching speed than using NOR gates. Simulation results show that the proposed, VCRO operates in the frequency range of 3.72 GHz to 8 GHz with power consumption of 4.7mW at 4GHz and phase noise of ~-86.79dBc/Hz at 1MHz offset. Therefore, the proposed oscillator demonstrates superior performance compared with previous high-speed voltage-controlled ring-oscillators and can be used to build high-performance frequency synthesizers and phase-locked loops for radio-frequency applications.