• Proceedings of the Korean Information Science Society Conference
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• 2003.04d
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• pp.196-198
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• 2003

배터리를 주 전력원으로 사용하는 MANET(Mobile Ad hoc NETwork)에서 전력 소비를 줄이는 방법에 대한 연구가 활발히 진행되고 있지만, 이의 실험을 지원하는 시뮬레이션 도구를 찾아보기는 어렵다. 본 논문에서는 IEEE 802.11의 DCF-PSM 시뮬레이션 환경을 제공하기 위해 ns-2에 PSM 모듈을 구현하였고, 특히 전력 소비와 관련된 결과 자료를 쉴게 생성하기 위해 여러 가지 편의성을 제공하는 에너지 모델을 제안하였다. 이러한 모들의 개발로 PSM 환경에서의 상위 계층 프로토콜의 성능 평가나 PSM에 적합한 새로운 상위 계층 프로토콜의 개발이 가능해졌고, PSM을 개선하는 알고리즘의 구현과 그의 성능 평가도 훨씬 쉽게 이루어질 수 있게 되었다.

• Annual Conference of KIPS
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• 2023.11a
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• pp.549-552
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• 2023

현재 전력망에서는 불규칙하거나 낭비되는 전력 문제를 해결하기 위한 한 방법으로 ESS(Energy Storage System)를 활용하는 방법이 많은 관심을 받고 있다. 본 연구에서는 업종별로 시간대에 따라 요금을 다르게 부과하는 배전망 시스템에서, 배터리를 보다 경제적으로 사용하는 동시에 여유 용량을 유지하도록 하는 DQN 기반 강화학습 기법을 제안하였다. 또한, 업종별로 다른 전력 소비 패턴을 에이전트의 동작성과 함께 그 성능을 분석하고 비교하였다.

• Journal of the Korean Institute of Intelligent Systems
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• v.24 no.4
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• pp.403-411
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• 2014

In this paper, an algorithm of extracting the features of home appliances and automatically building a database to identify home appliances is designed and presented. For the verification, a software library supporting this algorithm is implemented and added to an power management system server, which was already implemented to support real-time monitoring of home appliances' power consumption status and controlling their power. The implemented system consists of a system server and clients, each of which measures the power consumed by a home appliance plugged in it and transmits the information to the server in real-time over a wireless network. Through experiments, it is verified that it is possible to identify any home appliance connected to a specific client.

• Fire Science and Engineering
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• v.16 no.2
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• pp.1-7
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• 2002

In the normally, exit sign is always lighting on status by the connected to normal electrical source. So, there are happened to rise of the economical cost such as power consumption, maintenances and repair replacement of lamp etc. This paper are study on the new exit sign circuits by using high efficiency LED that is available for remote control and reduceible to power consumption, maintenance cost by the way of compensation fluorescent and incandescent lamps. As a results on the study, exit sign lamp is capable of control and supervisory in trigger angle by the remote control switch, widely and easily. And then, the response time was very fast in 600〔$\mu$s〕and also it can be find that the rising and fall time of oscillate circuit is maximum 200〔ns〕 as high sensitively. Finally, it obtain to the result that reducible of electrical power consumption and not required for replacement of lamp by using the high efficiency LED lighting source.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.6
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• pp.1145-1152
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• 2019

In this paper, a low power current mode 12-bit ADC(: Analog to Digital Converter) is proposed to mix digital circuits and analog circuits with the advantages of low power consumption and high speed operation. The proposed 12 bit ADC is implemented by using 4-bit ADC in a cascade structure, so its power consumption can be reduced, and the chip area can be reduced by using a conversion current mirror circuit. The proposed 12-bit ADC is SK Hynix 350nm process, and post-layout simulation is performed using Cadence MMSIM. It operates at a supply voltage of 3.3V and the area of the proposed circuit is 318㎛ x 514㎛. In addition, the ADC shows the possibility of operating with low power consumption of 3.4mW average power consumption in this paper.

• Journal of the Korean Institute of Intelligent Systems
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• v.16 no.4
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• pp.443-448
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• 2006

In this paper, a novel method is proposed for generating the low-power and stable walking trajectory of biped robots, and then a biped robot with 25 DOFs(degrees of freedom) is designed and implemented for the realization of the low-power walking trajectory generated by the proposed method. In our method, first a stable VPCG(vertically projected center of gravity) trajectory is generated, and then the trajectories of ankle and pelvis of a biped robot are planned to follow the preplanned stable VPCG trajectory, which produces a waking pattern without bending its knees and enables a biped robot to walk with less power consumption. On the other hand, a biped robot implemented in this paper has the mechanical structure of foot that enables a biped robot to support on the ground well, and the mechanical structure of pelvis that enables a biped robot to move flexibly. From results of the walking experiment and power consumption measurement, it was confirmed that the proposed method can generate the more stable and flexible trajectory with less power consumption compared with the existing methods which do not use the ankle of a biped robot.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.13 no.4
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• pp.75-81
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• 1999

This paper presents in the rrethod power demand estimated of consuming facility algorithm using orthogonal polynomial regression rmdel. Estimation rmdel presented can use mathematical rrethod consists. of extrapolation and correlation rrethod, Computation tirre and capacity of presented rmdel was rmre economic than multiple regression rrodel because low-order equation can use in the high-order equation without sorre correction, and vice-versa. Therefore this rmthed can be very usefulness rmthed in the power demand estimation Fourth-order rrodel was very good armng this rrodel that was coJTJp)Sed the estimation rmdel of second, third and fourth-order. Power demand estimated result of consuming facility using correlation rrethod was good in the percentage error of about 2[%1 Also It was to verify efficiency and awroPJiation the estimated rmdel that estimation percentage error was about 1[%] in the oower demand estimated result of 1997.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.8 no.3
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• pp.27-35
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• 1994

As a study on the method for energy-saving of the neon sign, this paper has systematically investigated the quantity of energy-consumption of the sign through a long period of time, according to the changes of the sign's ON/OFF speed, time ratio, etc. One neon sign(1 [kW] was built up for this. For this experiment, the ON/OFF periods(T) were set to 1.0,2.0,4.0 and 8.0[sec), and the ON time ratios(D) to 25, 50, 75 and 100 [%] respectively. Energy Analyzer was used for more accurate measurement. As the result, we found that the energy consumption of the sign had no effect on the ON/OFF period (T) when T was more than 2.0(sec), but that the energy consumption was decreasing when T was less than 2.0[sec]. The greatest value in the energy-saving of the sign appeared when the values of T and D were small altogather. And under the conditions, the energy consumption with T=1.0[sec) and D= 25[%] decreased 83.0[%] in comparison with the continuous ON case.

• Electric Engineers Magazine
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• v.216 no.8
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• pp.9-13
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• 2000

수용가의 수전전력은 개개의 설비의 소비전력이 합성된 것으로 시시각각 변화하고 있으나 시간적인 변동사항을 나타낸 것이 부하곡선이며 1일분을 30분 또는 1시간마다의 평균전력으로 나타낸 것이 일부하곡선이다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.21 no.5
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• pp.59-69
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• 2011

Since power analysis attack which uses a characteristic that power consumed by crypto device depends on processed data has been proposed, many logics that can block these correlation originally have been developed. DRP logic has been adopted by most of logics maintains power consumption balanced and reduces correlation between processed data and power consumption. However, semi-custom design is necessary because recently design circuits become more complex than before. This design method causes unbalanced design pattern that makes DRP logic consumes unbalanced power consumption which is vulnerable to power analysis attack. In this paper, we have developed new logic style which adds another discharge phase to discharge two output nodes at the same time based on DyCML to remove this unbalanced power consumption. Also, we simulated 1bit fulladder to compare proposed logic with other logics to prove improved performance. As a result, proposed logic is improved NED and NSD to 60% and power consumption reduces about 55% than any other logics.