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http://dx.doi.org/10.13089/JKIISC.2011.21.5.59

Three Phase Dynamic Current Mode Logic against Power Analysis Attack  

Kim, Hyun-Min (Graduate School of Information Management and Security, Korea University)
Kim, Hee-Seok (Graduate School of Information Management and Security, Korea University)
Hong, Seok-Hee (Graduate School of Information Management and Security, Korea University)
Publication Information
Journal of the Korea Institute of Information Security & Cryptology / v.21, no.5, 2011 , pp. 59-69 More about this Journal
Abstract
Since power analysis attack which uses a characteristic that power consumed by crypto device depends on processed data has been proposed, many logics that can block these correlation originally have been developed. DRP logic has been adopted by most of logics maintains power consumption balanced and reduces correlation between processed data and power consumption. However, semi-custom design is necessary because recently design circuits become more complex than before. This design method causes unbalanced design pattern that makes DRP logic consumes unbalanced power consumption which is vulnerable to power analysis attack. In this paper, we have developed new logic style which adds another discharge phase to discharge two output nodes at the same time based on DyCML to remove this unbalanced power consumption. Also, we simulated 1bit fulladder to compare proposed logic with other logics to prove improved performance. As a result, proposed logic is improved NED and NSD to 60% and power consumption reduces about 55% than any other logics.
Keywords
Side Channel Attack; Countermeasure; semi-custom design; DyCML;
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