• Proceedings of the Korea Information Processing Society Conference
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• 2013.05a
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• pp.659-662
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• 2013

과거에는 보안디바이스의 안전성을 탑재된 암호알고리즘의 안전성에 의존하였다. 하지만 부채널 분석을 통해 암호알고리즘의 안전성과는 별개로 부채널 정보에 의한 보안디바이스의 물리적 취약성이 존재함이 밝혀졌다. 이러한 보안디바이스의 물리적 취약성을 보완하기 위해서는 최소 2차 상관전력분석에 대한 대응법이 간구되어야 한다. 최근 2차 상관전력분석에 대한 실용적인 대응법으로 1차 마스킹과 셔플링을 혼합한 방법을 많이 활용하고 있다. 하지만 1차 마스킹과 셔플링이 혼합된 부채널 대응법을 1차 상관전력분석으로 분석하였을 경우, 특이한 피크가 발생한다. 본 논문에서는 마스킹과 셔플링이 혼합된 부채널 대응법을 1차 상관전력분석으로 분석하였을 때, 특이한 피트가 발생함을 실험적으로 확인하였고, 그 피크 발생 원인을 소개한다. 뿐만 아니라, 피크 발생 정보를 추가적인 부채널 분석 정보로 활용할 수 있는 방법을 소개한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2019.10a
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• pp.449-452
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• 2019

초 경량암호 CHAM은 자원이 제한된 장치 상에서 효율성이 뛰어난 덧셈, 회전연산, 그리고 XOR 연산으로 이루어진 알고리즘이다. CHAM은 특히 사물인터넷 플랫폼에서 높은 연산 성능을 보인다. 하지만 사물 인터넷 상에서 사용되는 경량 블록 암호화 알고리즘은 부채널 분석에 취약할 수 있다. 본 논문에서는 CHAM에 대한 1차 전력 분석 공격을 시도하여 부채널 공격에 대한 취약성을 증명한다. 이와 더불어 해당 공격을 안전하게 방어할 수 있도록 마스킹 기법을 적용하여 안전한 알고리즘을 제안한다.

• The KIPS Transactions:PartC
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• v.18C no.4
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• pp.213-216
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• 2011

Differential Power Analysis is fully affected by various noises including temporal misalignment. Recently, Ryoo et al have introduced an efficient preprocessor method leading to improvements in DPA by removing the noise signals. This paper experimentally proves that the existing preprocessor method is not applied to all processor. To overcome this defect, we propose a Differential Trace Model(DTM). Also, we theoretically prove and experimentally confirm that the proposed DTM suites DPA.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.8-15
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• 2009

Side-channel attacks including the differential power analysis attack are often more powerful than classical cryptanalysis and have to be seriously considered by cryptographic algorithm's implementers. Various countermeasures have been proposed against such attacks. In this paper, we deal with the masking method, which is known to be a very effective countermeasure against the differential power analysis attack and propose new gate-level conversion methods between Boolean and arithmetic masks. The new methods require only 6n-5 XOR and 2n-2 AND gates with 3n-2 gate delay for converting n-bit masks. The basic idea of the proposed methods is that the carry and the sum bits in the ripple adder are manipulated in a way that the adversary cannot detect the relation between these bits and the original raw data. Since the proposed methods use only bitwise operations, they are especially useful for DPA-securely implementing cryptographic algorithms in hardware which use both Boolean and arithmetic operations. For example, we applied them to securely implement the block encryption algorithm SEED in hardware and present its detailed implementation result.

• Journal of Korea Society of Industrial Information Systems
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• v.7 no.4
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• pp.1-8
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• 2002

Attacks have been proposed that use side information as timing measurements, power consumption, electromagnetic emissions and faulty hardware. Elimination side-channel information of prevention it from being used to attack a secure system is an active ares of research. In this paper, differential power analysis techniques used to attack DES are compared and analyzed finally, we propose a software prevention idea of DPA attack for DES-like ciphers.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.21 no.5
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• pp.59-69
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• 2011

Since power analysis attack which uses a characteristic that power consumed by crypto device depends on processed data has been proposed, many logics that can block these correlation originally have been developed. DRP logic has been adopted by most of logics maintains power consumption balanced and reduces correlation between processed data and power consumption. However, semi-custom design is necessary because recently design circuits become more complex than before. This design method causes unbalanced design pattern that makes DRP logic consumes unbalanced power consumption which is vulnerable to power analysis attack. In this paper, we have developed new logic style which adds another discharge phase to discharge two output nodes at the same time based on DyCML to remove this unbalanced power consumption. Also, we simulated 1bit fulladder to compare proposed logic with other logics to prove improved performance. As a result, proposed logic is improved NED and NSD to 60% and power consumption reduces about 55% than any other logics.

• KIPS Transactions on Computer and Communication Systems
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• v.9 no.5
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• pp.107-112
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• 2020

Ultra-lightweight password CHAM is an algorithm with efficient addition, rotation and XOR operations on resource constrained devices. CHAM shows high computational performance, especially on IoT platforms. However, lightweight block encryption algorithms used on the Internet of Things may be vulnerable to side channel analysis. In this paper, we demonstrate the vulnerability to side channel attack by attempting a first power analysis attack against CHAM. In addition, a safe algorithm was proposed and implemented by applying a masking technique to safely defend the attack. This implementation implements an efficient and secure CHAM block cipher using the instruction set of an 8-bit AVR processor.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.2
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• pp.345-350
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• 2009

In this paper, it is reviewed vulnerability of security in S-MAC communication protocol of sensor network, and analyzed in the respect of power efficiency, which is consumed at each stage of communication procedure in according to vulnerability of denial of service. Therefore, from research results, it can be induced the need of authentication scheme, which is considered reliability, efficiency and security of normal S-MAC communication.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 2006.06a
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• pp.159-163
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• 2006

1999년 P.Kocher에 의해 전력분석공격에 대한 연구결과가 발표된 이후, 부채널 공격에 의한 많은 암호장치들의 취약성 및 대응방법들에 대한 연구가 이루어지고 있다. 지금까지 제안된 대응방법중 마스킹 기법이 소프트웨어적으로 구현하는데 가장 효율적이다. 하지만, 최근 마스킹이 적용될 AES에 대한 효율적인 2차 DPA 공격결과가 발표되었다. 본 논문에서는 마스킹이 적용된 국가표준암호 ARIA를 대상으로 2차 DPA 공격을 성공적으로 수행하였다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.5
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• pp.987-995
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• 2022

Deep learning-based profiling side-channel analysis has been many proposed. Deep learning-based profiling analysis is a technique that trains the relationship between the side-channel information and the intermediate values to the neural network, then finds the secret key of the attack device using the trained neural network. Recently, cross-device profiling side channel analysis was proposed to consider the realistic deep learning-based profiling side channel analysis scenarios. However, it has a limitation in that attack performance is lowered if the profiling device and the attack device have not the same chips. In this paper, an environment in which the profiling device and the attack device have not the same chips is defined as the different-device, and a novel deep learning-based profiling side-channel analysis on different-device is proposed. Also, MCNN is used to well extract the characteristic of each data. We experimented with the six different boards to verify the attack performance of the proposed method; as a result, when the proposed method was used, the minimum number of attack traces was reduced by up to 25 times compared to without the proposed method.