• Journal of Advanced Marine Engineering and Technology
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• v.41 no.4
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• pp.316-322
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• 2017

The primary objective of the current study is to develop outstanding hull form on resistance performance by using numerical analysis code. Model tests were conducted to assess the resistance performance of the developed hull form. The investigation of an existing vessel was performed for validating the actual ship design based on the drawing. The operating displacement and speed were mainly confirmed through investigation of the existing vessel. The resistance performance of the existing vessel was analyzed using numerical code. The developed vessel was derived through studies on wave improvement of the bow shoulder, the balance of displacement distribution, the modification of the frame shape, and the size and shape change of the center skeg. Based on the results of a computational fluid dynamics analysis, the resistance performance of the developed vessel showed an improvement of 15% over the existing vessel at a speed of 11 knots. Resistance tests were conducted to evaluate the performance of the existing vessel and the developed vessel in the towing tank. Finally, the effective horsepower of the developed vessel showed an improvement of 17% over the existing vessel.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.199-199
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• 2012

최근 그래핀의 대면적 합성 및 롤투롤 전사 공정의 개발로 그래핀의 상용화가 가시화 되고 있다. 하지만, 그래핀의 독특한 특성인 선형적이고 밴드갭이 없는 에너지 띠 분포 때문에 반도체 소자로서의 직접적인 적용에는 한계가 있다. 이러한 문제를 해결하기 위한 돌파구로써, 그래핀 복합체의 연구와 개발이 활발히 진행되고 있으며 본 연구에서는 그래핀 복합 적층 구조를 다룬다. 이는 디스플레이, 초고속 반도체 소자, 고성능 광전자소자 및 초고감도 센서 등 다양한 분야에 대한 그래핀의 실용화 가능성이 높아진 것을 의미한다. 특히, 높은 가시광 투과도와 낮은 면저항으로 기존 투명 전극에 대표적으로 사용되고 있는 ITO (Indium Tin Oxide)를 그래핀으로 대체하는 것에 관한 연구가 활발히 진행되고 있다. 하지만 그래핀이 높은 전자이동도를 가지는 것에 비하여 비저항과 투과도 측면에 있어서는 ITO의 성능을 뛰어넘지 못하는 실정이다. 따라서 본 연구에서는 ITO가 가지는 취약점인 기판과의 약한 접착력, 높은 취성, 기판과의 열팽창률 차이 등의 공정상 문제점을 극복하고자 하였다. 그래핀 복합 적층 필름은 플라스틱 기판 (PET) 위에 열 화학기상증착법(Chemical Vapor Deposition, CVD)을 이용하여 합성한 그래핀을 전사하고, ITO 용액을 도포한 다음 다시 그래핀을 씌워 제작하여 샌드위치 구조(sandwich structure)를 형성하였다. 완성된 필름은 광학적, 전기적 특성 분석을 수행하였다. 광학적 분석으로는 라만 분광을 이용한 그래핀 품질평가와 파장대에 따른 광 투과도, 그리고 반사도 측정을 하였으며, 전기적 특성은 면저항을 측정함으로써 분석한다. 결함이 적고, 대면적에 걸쳐 한 층을 이루어야 하는 고품질 그래핀의 요구사항에 따라 라만 분광의 G, 2D, D 띠를 분석하였다. G와 2D 띠의 비율을 통해 그래핀의 층 수를, D 띠의 강도를 통해 결함의 유무를 판단하였다. 또한, 가시광 영역에서 90% 이상의 광 투과도를 보여야 하는 투명 소자의 요구사항 달성 정도를 UV-VIS를 이용하여 확인하였다. 마지막으로, 제작한 필름의 면저항 또한 4-프로브 멀티미터를 이용하여 측정하고, 일반적인 터치스크린의 면저항인 $500{\Omega}/sq$를 만족하는지 평가하였다.

• Geophysics and Geophysical Exploration
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• v.3 no.3
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• pp.88-93
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• 2000

The present study may be summarized as follows. By means of a pole-pole electrical survey, major geological features, i.e, fresh rocks, fractured & weak & saturated rocks, fresh water bearing aquifer, were successfully delineated in the surveyed area of a granite region in Korea. The subsequent Schlumberger sounding and drilling confirmed the existence of the acquifer at 60 m depth as expected. But one more minor acquifer which does not show up in the resistivity depth section was met at 100 m depth. A simple forward modelling leads the authors to believe that any other electrode configuration, e.g., Wenner, Schlumberger, dipole-dipole, pole-dipole, would not detect the deeper aquifer. Under these circumstances, further studies remain to be done in connection with the spatial resolution in the vertical direction.

• KOREAN JOURNAL OF CROP SCIENCE
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• v.26 no.4
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• pp.324-331
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• 1981

Sixty five soybean varieties were tested to observe varietal response and to get the basic data for resistant variety breeding to soybean cyst nematode (Heterodera glycines I.). They were classified into five groups, from the most resistant to the most susceptible by decreasing rate of seed weight. A few Korean varieties were included in the most resistant group. In general, early maturing varieties were more susceptible. Total plant weight could be used as an important criterion to select a resistant variety to soybean cyst nematode.

• Journal of Korean Tunnelling and Underground Space Association
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• v.11 no.4
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• pp.361-371
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• 2009

Resistivity tomography is very effective geophysical method to find out the resistivity distribution and its change in time around a tunnel. Thus, the resistivity tomogram can provide helpful information which is necessary for the effective maintenance of the tunnel. However, an air filled tunnel severely distorts tomography data, especially when the current or potential electrode is placed near the tunnel. Moreover, the distortion can often lead to misinterpretation of tomography monitoring data. To solve these problem, we developed a resistivity modeling and time-lapse inversion program which include a tunnel. In this study, using the developed program we assured that the inversion including a tunnel gives much more accurate image around a tunnel, compared with the conventional tomogram where the tunnel is not included. We also confirmed that the time-lapse inversion of resistivity monitoring data defines well resistivity changed areas around a tunnel in time.

• The Journal of Engineering Geology
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• v.19 no.1
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• pp.1-8
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• 2009

Geophysical surveys were conducted on an upper part of a natural slope located at Daejeon University. Electrical resistivity and seismic refraction measurements were carried out to obtain information on a weathered zone and internal structure at shallow depth, while AMT measurement a bed rock and geological structure at deep depth. With all the techniques applied, these results show a good correlation between electrical resistivity images and refraction velocity distributions for the characterization of a weathering and geological structure at depth. In particular, AMT survey seems to be the powerful tool for detecting a distribution of a bed rock with deep depth. The combined geophysical investigation produced a detailed image of a subsurface structure and improved well in the interpretation.

• Proceedings of the KAIS Fall Conference
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• 2002.05a
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• pp.151-154
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• 2002

반도체 소자의 기판 재료로 사용되고 있는 실리콘 웨이퍼는 그 정밀도가 매우 중요하다. 본 연구에서는 균일한 Dopant 농도 분포를 얻을 수 있는 중성자 변환 Doping을 이용하여 실리콘에 인(P)을 Doping하는 연구를 수행하였다. 중성자 변환 Doping, 즉 NTD(Neutron Transmutation Doping)란 원자번호 30인 실리콘 동위원소에 중성자가 조사되면 원자번호 31인 실리콘으로 변환되고, 2.6시간의 반감기를 갖고 decay 되면서 인(P)으로 변하게 되어 실리콘 웨이퍼에 n-type 전도를 갖게 하는 것을 말한다. 본 연구에서는 하나로 원자로를 이용하여 고저항(1000-2000Ωcm) FZ 실리콘 웨이퍼 에 두 개의 조사공에서 중성자 조사하여 저항의 변화를 관찰하였고, 중성자 조사시 발생하는 점결함을 분석하여 점결함이 저항 변화에 미치는 영향을 알아보았다. 중성자 조사 전 이론적 계산에 의해 HTS조사공은 5Ωcm, 20.1Ωcm 이고 IP3조사공은 5Ωcm, 26.5Ωcm, 32.5Ωcm 이었고, 중성자 조사 후 SRP로 측정한 결과 실제 저항값은 HTS-1 2.10Ωcm, HTS-2 7.21Ωcm 이었고, IP-1은 1.79Ωcm, IP-2는 6.83Ωcm, 마지막으로 IP-3는 9.23Ωcm 이었다. DLTS 측정 결과 IP조사공에서 새로운 피의 결을 발견할 수 있었다.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.4
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• pp.275-281
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• 2003

A new neural oscillator has been designed and fabricated in an 0.5 ${\mu}{\textrm}{m}$ double poly CMOS technology. The proposed neural oscillator consists of a nonlinear variable resistor with negative resistance as well as simple transconductors and capacitors. The variable negative resistor which is used as a input stage of the oscillator consists of a positive feedback transconductors and a bump circuit with Gaussian-like I-V curve. The proposed neural oscillator has designed in integrated circuit with SPICE simulations. Simulations of a network of 4 oscillators which are connected with excitatory and inhibitory synapses demonstrate cooperative computation. Measurements of the fabricated oscillator chip with a $\pm$ 2.5 V power supply is shown and compared with the simulated results.

• Journal of the Korean Institute of Intelligent Systems
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• v.16 no.1
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• pp.24-29
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• 2006

A new oscillatory neural circuit with computational function has been designed and been designed and fabricated in an $0.5{\mu}m$ double poly CMOS technology. The proposed oscillatory circuit consists of 3 neural oscillators with excitatory synapses and a neural oscillator with inhibitory synapse. The oscillator block which is a basic element of the neural circuit is designed with a variable negative resistor and 2 transconductors. The variable negative resistor which is used as a input stage of the oscillator consist of a bump circuit with Gaussian-like I-V curve. SPICE simulations of a designed neural circuit demonstrate cooperative computation. Measurements of the fabricated neural chip in condition of ${\pm}$ 2.5 V power supply are shown and compared with the simulated results.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.3
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• pp.72-78
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• 1990

In this paper, the physical meanings of LDD optimization are treated by numerical simulation and related experiments are attempted to analyzed the optimized LDD structure. Firstly, according to the numerical analysis, the electric field under the n-region near drain is low and uniformly distributed and the current flow is widely distributed in this region under the optimized conditions. It is also found that this optimized point should be achieved by globally optimizing all the process and electrical conditions. Secondly, the maximum electric field, which is obtained from the substrate current to the drain current ratio, is minimized under the optimized condition according to the experiment. Further, the device lifetime is maximized and the n-resistance is changed smoothly from the channel resistance to the $n^+$junction resistance.