• Journal of the Korea Society of Computer and Information
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• v.16 no.7
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• pp.59-65
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• 2011

Korea DMB Service is popularized, and is used by many users. But latest display devices compared to the DMB content resolution support higher resolution and a variety of video resampling technologies has been used. Generally, subjective video quality is determined by object recognition rate in video, and increased as the edge space between objects are more clear. An edge is the boundary between an object and the background, and indicates the boundary between overlapping objects. the predicted direction in intra prediction used in H.264/AVC has the similarity up to 80% for the edge information. In the study, we propose an effective up-sampling mothed using the edge information that is extracted for the relationship between the intra prediction data and the DCT coefficient data of H.264 video encoding.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.195-197
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• 2005

In the scalable extension of H.264/AVC, spatial scalability is provided residual information as encoding layered spatial resolution between layers. We use the inter-layer prediction to remove this redundancy. In the inter-layer prediction, as the prediction we can use the signal that is the upsampled signal of the lower resolution layer. In this case, coding efficiency can be different from optimal prediction by kinds of interpolation filter. This paper indicates technique to choose the interpolation filter and to enhance coding efficiency for finding more correct prediction in intra macroblock.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2004.11a
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• pp.65-70
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• 2004

본 논문에서는 화면간 상관성을 이용한 최적의 비트 할당 알고리즘을 제안한다 제안된 알고리즘은 기존의 Q2 비트율 제어 알고리즘을 기반으로 하며, 인트라(Intra) 화면에 대한 비트할당과 인터(Inter) 화면에 대한 비트 할당으로 구성된다. 일반적으로 비디오 시퀀스(Sequence)의 각 화면들은 서로 많은 상관성을 가지고 있다. 본 논문에서는 이러한 점을 고려하여, 다른 화면들의 화질에 상대적으로 더 많은 영향을 미칠 수 있는 중요한 화면을 선택하고, 선택된 화면들은 각각의 중요도에 따라 더 많은 비트가 할당되어 화질이 향상된다. 선택된 화면의 화질 향상은 이 화면으로부터 움직임 예측과 움직임 보상을 하는 다른 화면의 화질까지도 향상시킨다. 본 논문에서 제안된 방법은 MPEG-4비디오를 비롯하여 최근에 만들어진 H.264/AVC 부호화 표준에서도 좋은 결과를 보였다.

• Proceedings of the Korean Information Science Society Conference
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• 2007.10d
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• pp.564-568
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• 2007

H.264/AVC는 최신의 국제 비디오 압축 표준으로 가변블록크기 지원, 다중 참조 프레임 움직임 보상 등의 기법으로 이전의 압축 표준인 MPEG-4, H.263등에 비해 비슷한 화질에서 비트율을 거의 50%정도 줄였다. 이러한 기법들로 압축 효율성이 높아진 반면, 계산 복잡도는 증가하게 되었다. 따라서 본 논문에서는 움직임 벡터 예측인 MVP를 이용하여 시간적 상관성을 고려하고 프레임 내의 주위 매크로블록 모드정보에 가중치를 부여하여 부호화를 매크로블록의 최종 모드를 빠르게 선택하는 기법을 제안한다. 실험에서 JM10.2의 모드 선택기법과 비교한 결과, 평균 85%이상 선택한 모드가 동일함을 보여주었다.

• Proceedings of the Korean Information Science Society Conference
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• 2005.07a
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• pp.805-807
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• 2005

H.264/AVC의 프레임내 예측기법은 현 매크로블록의 이웃픽셀들로부터 예측값을 추출함으로써 인트라 픽처의 압축률을 높이는데 크게 기여했다. 그러나 모든 매크로블록에 대해 총 17가지의 후보 모드를 검사해야 하기 때문에, 전체 부호화기의 복잡도를 상당히 상승시키는 요인이기도 하다. 본 논문에서는 이 문제를 해결하기 위해, 기존의 움직임 추정 전용 하드웨어로 주로 사용되는 1차원 시스톨릭 어레이 구조에 부가적인 하드웨어를 장착하여, 움직임 추정뿐만 아니라 프레임 내 예측까지 가능한 하드웨어 구조를 제안한다. 병렬적으로 끊김이 없는 수행을 위해 프레임내 예측 알고리즘을 약간 수정했으나, 이것은 화질이나 비트스트림 크기에 영향을 거의 미치지 않는다. 제안된 구조는 연산에 대한 명령어 개수로 비교할 때, ARM 기반 시스템에서 얻을 수 있는 성능의 10배에서 40배에 달하는 높은 성능을 보여준다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.1
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• pp.119-126
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• 2012

H.264/AVC can use three transforms depending on types of residual data which are to be coded. H.264/AVC always executes $4{\times}4$ DCT transform. In $16{\times}16$ intra mode only, $4{\times}4$ Hadamard transform for luma DC coefficients and $2{\times}2$ Hadamard transform for chroma DC coefficients are performed additionally. Quantization is carried out to achieve further data compression after transform coding is completed. In this paper, the hardware implementation for DCT transform, Hadamard transform and quantization is studied. Especially, the proposed architecture adopting the pipeline technique can output a quantized result per clock cycle after 33-clock cycle latency. The proposed architecture is coded in Verilog-HDL and synthesized using Xilinx 7.1i ISE tool. The operating frequency is 106MHz at SPARTAN3S-1000. The designed IP can process maximum 33-frame at $1920{\times}1080$ HD resolution.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.93-101
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• 2007

Small area and low power implementation are important requirements for various multimedia processing hardware, especially for mobile environment. This paper presents a hardware architecture of H.264/AVC Intra Prediction module aiming on small area and low power. A single arithmetic unit was shared and processed sequentially for all mode decisions and computations to predict an image frame. As a result, we could get smaller area and smaller memory size compared to other existing implementations. The proposed architecture was verified using the Altera Excalibur device, and the implemented hardware has been described in Verilog-HDL and synthesized on Samsung STD130 0.18um CMOS Standard Cell Library using Synopsys Design Compiler. The synthesis result was about 11.9K logic gates and 1078 byte internal SRAM and the maximum operating frequency was 107Mhz. It consumes 879,617 clocks to process one QCIF frame, which means it can process 121.5 QCIF$(176\times144)$ frames per second, therefore it shows that it can be used for real time H.264/AVC encoding of various multimedia applications.

• The Journal of the Korea Contents Association
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• v.16 no.10
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• pp.514-521
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• 2016

The High Efficiency Video Coding (HEVC) standard provides superior coding efficiency by utilizing highly flexible block structure and more diverse coding modes. However, rate-distortion optimization (RDO) process for the decision of optimal block size and prediction mode requires excessive computational complexity. To alleviate the computation load, this paper proposes a new moment-based fast CU size decision algorithm for intra coding in HEVC. In the proposed method, moment values are computed in each CU block to estimate the texture complexity of the block from which the decision on an additional CU splitting procedure is performed. Unlike conventional methods which are mostly variance-based approaches, the proposed method incorporates the third-order moments of the CU block in the design of the fast CU size decision algorithm, which enables an elaborate classification of CU types and thus improves the RD-performance of the fast algorithm. Experimental results show that the proposed method saves 32% encoding time with 1.1% increase of BD-rate compared to HM-10.0, and 4.2% decrease of BD-rate compared to the conventional variance-based fast algorithm.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.4
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• pp.58-66
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• 2009

Recently the emerging demands of the light-video encoder promotes lots of research efforts on DVC (Distributed Video Coding). As an appropriate video compression method, DVC has been studied, and Wyner-Ziv (WZ) video compression is its one representative structure. The WZ encoder splits the image into two kinds of frames, one is key frame which is compressed by conventional intra coding, and the other is WZ frame which is encoded by WZ coding. The WZ decoder decodes the key frame first, and estimates the WZ frame using temporal correlation between key frames. Estimated WZ frame (Side Information) cannot be the same as the original WZ frame due to the absence of the WZ frame information at decoder. As a result, the difference between the estimated and original WZ frames are regarded as virtual channel noise. The WZ frame is reconstructed by removing noise in side information. Therefore precise noise estimation produces good performance gain in WZ video compression by improving error correcting capability by channel code. But noise cannot be estimated precisely at WZ decoder unless there is good WZ frame information, and generally it is estimated from the difference of corresponding key frames. Also the estimated noise is limited by comparing with frame level noise to reduce the uncertainty of the estimation method. However these methods cannot provide good noise estimation for every frame or each bit plane. In this paper, we propose a noise nodel selection method which chooses a better noise model for each bit plane after generating candidate noise models. Experimental result shows PSNR gain up to 0.8 dB.

• Journal of the Institute of Convergence Signal Processing
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• v.4 no.2
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• pp.31-39
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• 2003

The MPEG-2 source coding algorithm is very sensitive to transmission errors due to using of variable-length coding. When the compressed data are transmitted, transmission errors are generated and error correction scheme is not able to be corrected well them. In the decoder error concealment (EC) techniques must be used to conceal errors and it is able to minimize degradation of video quality. The proposed algorithm is method to conceal successive macroblock errors of I-frame and utilize temporal information of B-frame and spatial information of P-frame In the previous GOP which is temporally the nearest location to I-frame. This method can improve motion distortion and blurring by temporal and spatial errors which cause at existing error concealment techniques. In network where the violent transmission errors occur, we can conceal more efficiently severe slice errors. This algorithm is Peformed in MPEG-2 video codec and Prove that we can conceal efficiently slice errors of I-frame compared with other approaches by simulations.