• Journal of Korea Society of Industrial Information Systems
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• v.11 no.4
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• pp.72-81
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• 2006

In this paper, we first define a total of 64 instructions that are considered to be essential and frequently used, construct a datapath diagram, determine the control sequence using a finite state machine, and implement an 8-bit microcontroller using FPGA in VHDL. In the past, only functional simulation results of a rudimentary microcontroller were reported, the microcontroller lacked interrupt handling capability, or it was not implemented in hardware. We have designed a self-contained 8-bit microcontroller such that it can perform data transfer, addition, and logical operations, as well as stack and external interrupt operations. Following timing simulation of the designed microcontroller, we implemented it in an FPGA and verified its operation successfully. The design and implementation has been done under the Altera MAX+PLUS II integrated development environment using the EP1K50TC144-3 chip. The maximum operating frequency, the total number of logic elements used, and the logic utilization were found to be 9.39 MHz, 2813, and 97%, respectively. The result can be used as a microcontroller IP, and as needs arise, the VHDL code can be modified accordingly.

• The KIPS Transactions:PartA
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• v.16A no.3
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• pp.189-198
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• 2009

The traditional interrupt-based protocol processing at end hosts has two priority-inversion problems. First, low-priority packets may interrupt and delay high-priority process executionssince interrupts have the highest priority in most operating systems. Second, low-priority packet may delay high priority packets when they arrive almost simultaneously since interrupt processing is performed in a FCFS (first come, first served) order. These problems can be solved by a priority-based protocol processing policy and implementation. However, general priority-based schemes commonly have the problem of starvation and cannot support the each network flow requiring the mutually exclusive QoS since the packets are processed in the FCFS order. Therefore, the priority-based schemes are not appropriate for different QoS-demanding applications. In this paper, we present a bottom-half-based approach that relies on priority- and budget-based processing. The proposed approach allows us to solve both the starvation and priority-inversion problems, and further enables effective QoS isolation between different network connections. This feature also enables bounding the protocol processing time at an end host. We finally show through experiments that the proposed approach achieves QoS isolation and control.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.48 no.5
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• pp.66-73
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• 2011

I try to solve the problem of the usage of the general software interrupt with the nested call of the software interrupt and the effective passing way of the parameters. The software interrupt should be protected against the indiscriminate access because it is used to call the system functions or to use the system resources by generating a software interrupt. But, it is difficult to effectively handle the SWI instruction because of its limited usage. I designed and implemented nested call of the software interrupt and the effective way that handle the parameters in the software interrupt service routine to solve this problem in this paper. In other words, from the single SWI call to the nested SWI call, I improved the software interrupt use all the more flexibly, and I compared and analyzed the strong and weak points of the two passing ways of the parameters. The main differences between these two ways are speed and readability. The stack pointer getting way incurred a lot of overhead although it has a very great readability. But, the stack pointer passing way producted 19% of the effectivity in speed by reduce overhead.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.6
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• pp.94-105
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• 2008

Numerous platforms have been developed for ZigBee-based network embedded systems. Also, operating systems like TinyOS have been installed to facilitate efficient implementation of wireless sensor network applications which collect data, and/or execute commands. First of all, porting an operating system on a new platform may need invention of a substitute for a required but unsupported hardware component. This paper presents a multiplexed virtual system timer for a platform without a counter comparator which we have contrived to emulate by using an extra counter. Such porting also injects unexpected faults which cause a variety of painful failures. Unfortunately, TinyOS requires to handle a lot of asynchronous hardware interrupts which are hard to trace during debugging. Besides, simulators are not available for a new platform since the models of hardware on the platform are not usually developed, yet. We propose novel instrumentation techniques which can be used to effectively trace the bugs in such lack of debugging environment. These techniques are used to identify and fix a great deal of nasty issues in porting TinyOS 2.0 on MG2400 and MG2455 platforms made by RadioPulse Inc.

• The Journal of the Korea Contents Association
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• v.10 no.10
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• pp.36-44
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• 2010

Recently, as new weapons are being developed, test equipments to test their functions inevitably require real-time features. However, since test equipments based on Windows can not support real-time requirements, we have no choice but to use third-party solutions such as RTX or INtime. This leads to increase the development cost of each test equipment. This paper suggests an real-time implemented kernel(RTiK) which operates as a device driver on Windows. RTiK provides another timer using the Local APIC of x86 microprocessors. It supports real-time requirements by periodically executing the required services using Windows-independent timer interrupts to guarantee task deadlines. To reduce the interrupt latency, we used deferred procedure calls provided by Windows. We also used the export driver to implement and modify user-defined functions without accessing the RTiK internals. Using an oscilloscope, we prove that the RTiK kernel proposed in this paper guarantees up to 0.1ms periods.

• Journal of the Korea Society for Simulation
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• v.17 no.4
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• pp.199-208
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• 2008

Lately, since Complementary Metal Oxide Semiconductor(CMOS) image sensor system has low power, low cost and been miniaturized, hardware and applied software studies using these strengths are being carrying on actively. However, the products equipped with CMOS image sensor based polling method yet has several problems in degree of completeness of applied software and firmware, compared with hardware’s. CMOS image sensor system has an ineffective synchronous problem due to superfluous message exchange. Also when a sending of data is delayed continually, overhead of re-sending is large. So because of these, it has a problem in structural stability according to Polling Method. In this study, polling cycle was subdivided in high-speed synchronization method of firmware -based through MCU and synchronization method of Stepwise was proposed. Also, re-connection and data sending were advanced more efficiently by using interrupt way. In conclusion, the proposed method showed more than 20 times better performance in synchronization time and error connection. Also, a board was created by using C328R board of CMOS image sensor-based and ATmega128L which has low power, MCU and camera modules of proposed firmware were compared with provided software and analyzed in synchronization time and error connection.

• Journal of the Korea Society of Computer and Information
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• v.25 no.6
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• pp.17-23
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• 2020

In this paper, collecting real-time data frames that occur during RS232 communication between an HMI and PLC of automation equipment by sniffing real-time information data frames through MCU without modification of the HMI or PLC, a method is proposed that allows users to collect data without being dependent on the modification of PLC and HMI systems. The user collects necessary information from the sniffing data through the parsing operation, and the original communication interface is maintained by transmitting the corresponding sniffing frame to the destination. The MCU's UART communication interface circuit is physically designed according to the RS232 communication standard, and this additionally improves efficiency more so than an interrupt-based system by using the DMA device inside the MCU. In addition, the data frame IO operation is performed by logically separating the work of the DMA interrupt service routine from the work of the main thread using the circular queue. Through this method, the user receives the sniffing data frame between the HMI and PLC in RS232 format, and the frame transfer between PLC and HMI arrives normally at the original destination. By sniffing the data frame without further modification of the PLC and HMI, it can be confirmed that it arrives at the user system normally.

• The Journal of the Acoustical Society of Korea
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• v.28 no.3
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• pp.229-238
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• 2009

This paper describes a sound engine of Korean traditional instruments, which are the Gayageum and Taepyeongso, by using a TMS320F2812. The Gayageum and Taepyeongso models based on commuted waveguide synthesis (CWS) are required to synthesize each sound. There is an instrument selection button to choose one of instruments in the proposed sound engine, and thus a corresponding sound is produced by the relative model at every certain time. Every synthesized sound sample is transmitted to a DAC (TLV5638) using SPI communication, and it is played through a speaker via an audio interface. The length of the delay line determines a fundamental frequency of a desired sound. In order to determine the length of the delay line, it is needed that the time for synthesizing a sound sample should be checked by using a GPIO. It takes $28.6{\mu}s$ for the Gayageum and $21{\mu}s$ for the Taepyeongso, respectively. It happens that each sound sample is synthesized and transferred to the DAC in an interrupt service routine (ISR) of the proposed sound engine. A timer of the TMS320F2812 has four events for generating interrupts. In this paper, the interrupt is happened by using the period matching event of it, and the ISR is called whenever the interrupt happens, $60{\mu}s$. Compared to original sounds with their spectra, the results are good enough to represent timbres of instruments except 'Mu, Hwang, Tae, Joong' of the Taepyeongso. Moreover, only one sound is produced when playing the Taepyeongso and it takes $21{\mu}s$ for the real-time playing. In the case of the Gayageum, players usually use their two fingers (thumb and middle finger or thumb and index finger), so it takes $57.2{\mu}s$ for the real-time playing.

• Journal of the Korea Society of Computer and Information
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• v.25 no.9
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• pp.193-201
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• 2020

In this study, we developed a simulation app that performs the Test-and-Set algorithm. The test-and-set algorithm is a highly difficult algorithm, so this simulation app was created for learners who have difficulty understanding it. Learners who want to understand the Test-and-Set algorithm gather to form a team, and use this simulation app to discuss and practice, and these teams can practice at the same time. The test-and-set, which is assumed to be a machine language, is not interrupted by using a queue, and it can be seen that the configured simulation app performs well in all three conditions of 'mutual exclusion', 'progress', and 'bounded waiting' that must be solved in the critical area problem.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.3
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• pp.247-259
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• 1992

In this paper, the types of the data exchange between a cell site and a cobile phonefor the call processing on the AMPS(Advanced Mobile Phone Service) are investigated, and the circuit for processing the wideband data stream according to the data types is designed and implemented. The circuit for detecting the Busy / Idle bit which is needed for determining the channel access, the circuit for detecting the word sync and the circuit for transmitting and receiving the wideband data is designed. The 3-out-of-5 majority vote of the 5received data is performed to reduce error and an algorithm requiring a small buffer size for real time processing of voting process is proposed. The method to overcome the computational complexity and the real time constraint of the conventional BCH decoding is proposed.