• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.68-77
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• 2003

An improved negative capacitance circuit that cancels out input impedance of a front-end in a bioimpedance measurement and operates stably with a low gain margin has been proposed. Since the proposed circuit comprises wide-band operational amplifiers, selecting operational amplifiers is easy, while an operational amplifier of prefer bandwidth should be chosen to apply conventional circuit. Also, since gain margin can be controlled by a feedback resistor connected serially with a feedback capacitor, gain margin is tuneable with a potentiometer. The input impedance of the proposed circuit is two times larger than that of the conventional circuit and 40-times than that without a negative capacitance circuit. Furthermore, closed-loop phase response of the proposed circuit is better than that of the conventional circuit or without a negative capacitance circuit. Above all, for the proposed circuit, the frequency at which a gain peaking occurs is higher than the frequency at which the loop gain becomes a maximum. Thus, the proposed circuit is not affected by a gain peaking and can be operated with a very low gain margin.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2000.11a
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• pp.328-332
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• 2000

본 논문에서는 기생 패치 구조와 적층 구조의 광대역 마이크로스트립 안테나에 평행 결합 선로 형태의 광대역 임피던스 정합 회로를 결합하여 쉽게 추가적인 임피던스 대역폭 개선을 얻을 수 있음을 제안하였다. 평행 결합 선로 형태의 광대역 임피던스 정합 회로 설계를 위하여 분포 회로 방식의 반복적인 방법을 제시하였고. 설계\ulcorner제작 결과 기생 패치 구조와 적층 구조에서 각각 56.23%와 16.45%의 추가적인 임피던스 대역폭 개선을 이룰 수 있었다. 그리고 방사 패턴과 측정된 이득을 보면 평행 결합 선로의 결합으로 인한 방사 패턴에서의 큰 변화는 보이지 않았고, 이득에서는 평행 결합 선로 부분의 커플링 손실로 인해 최대 이득이 약 1 dB 정도 감소하는 것을 확인할 수 있었다.

• The KIPS Transactions:PartA
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• v.12A no.6 s.96
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• pp.531-538
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• 2005

In the high performance Analog Information Processing Systems(AIPS), gain boosting or additional gain stage is required when the gain is not sufficient with one stage amplification. This work shows that high gain is neatly obtained by enhancing the gain using the negative resistance element. Compared to the conventional techniques, the proposed scheme enjoys full output swing, small circuit area and power consumption, and the applications to various configurations of amplifiers. The negative resistance element is placed between the differential output nodes when used in the Op-Amp. The HSPICE simulation indicates that enhancement of more than 40 dB is readily obtained in this simple configuration when the negative resistance element is implemented in the form of cross-coupled CMOS inverters.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.522-525
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• 1998

본 논문에서는 아날로그 증폭기의 특성 개선을 통해 아날로그 신호처리 시스템의 동작속도를 향상시키기 위해서 2단 연산증폭기 (two-stage opamp:TSO)의 주파수 응답 특성과 이득을 개선하기 위한 회로를 설계하고 시물레이션을 통해서 설계된 회로의 우수성을 증명하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.23-29
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• 2011

A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.9 no.1
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• pp.25-29
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• 1984

The active compensation of operational amplifeir is that it compensates the phase shift and the attennation of gain of OP Amp, according as the frequency increases. The compensation circuit is applied to VCVS and interting integrator. For VCVS, the phase shift of proposed compensated circuit is not concern with the frequency and the gain chracteristic is better than the proposde circuit by Soliman, according as the rate of feedback resistors of compensated circuit changes. Voltage follower accomplishies compgnsation using the same circuit. Also, the compensation circuit to increase O-ffactor in inverting integrator is proposed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.12
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• pp.3614-3621
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• 2009

In this paper, A CMOS low-voltage current mode integrator is designed. The designed current-mode integrator is based on linear cascode circuit that is newly proposed in this paper. When it is compared with gain(43.7dB) and unity gain frequency(15.2MHz) of the typical current-mirror type current-mode integrator, the proposed linear cascode current-mode integrator achieves high current gain(47.8dB) and unity gain frequency(27.8MHz). And a 5th Chebyshev current-mode filter with 7.03MHz cutoff frequency is designed. The designed all circuits are simulated by HSPICE using 1.8V-$0.18{\mu}m$ CMOS technology.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1148-1149
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• 2008

본 논문에서는 연료전지 동특성 개선을 위한 Boost컨버터 제어기를 모델링하였다. 전류형 DC/DC컨버터 회로에 PI제어기를 채용하여 전류 loop의 이득과 부하의 변화에 대한 동적응답이 가능하록 충분히 높게 하여, 폐루프 대역폭이 증가하도록 설계하였으며, 전압 loop의 이득은 전원으로서 연료전지의 느린 동특성을 고려하여 설계되었다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.430-434
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• 2002

Recently, lot of researchers pay attention to custom power equipments for power quality improvement, especially, voltage stabilization equipment using PWM AC-AC converter. In this paper, voltage regulation system with PWM Buck-Boost AC-AC converter is proposed and then the system is modelled and analyzed by using of Circuit DQ transformation whereby steady state characteristics such as equations for voltage gain and power factor are obtained. The equations become guide line for system design by showing the effect on system operations. Finally, some experiment will show validity of analysis.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.5 no.2
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• pp.61-67
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• 2012

In this paper, In this paper, we consider a dynamic range in the frequency converter to obtain a high conversion gain and linearity while operating area proposed to broaden the design. Super-heterodyne RF Front-End style was applied to the active mixer stage, GaAs devices were used. Circuit design easy and simple forms benefit circuit is constructed in the drain mixer, passive mixer with the operating area were compared and analyzed. The simulation results of the conversion gain of 2.4dB and 0.2dBm about a gain-compression point, and showed the dynamic range of 71.9dB, when compared with passive mixers, dynamic range of approximately 6dB improvement was identified. Measurements of an approximately 2dB conversion gain and-1.0dBm of the gain-compression point, and confirmed that the active area of 71.1dB. When compared with passive mixers, dynamic range of is reduced by approximately 8dB has been improved.