• Title/Summary/Keyword: 위상 조절

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Design of a Dual-band Class-E Power Amplifier using Metamaterial CRLH Transmission Lines (Metamaterial CRLH 전송선로를 이용한 이중대역 Class-E 전력증폭기 설계)

  • Lim, Sung-Gyu;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.48 no.9
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    • pp.54-58
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    • 2011
  • In this paper a dual-band Class-E power amplifier using Composite Right-/Left-Handed transmission lines and PIN diode is proposed. Dual-band operation is achieved by the frequency offset and nonlinear phase slope of CRLH TL for the matching network of power amplifiers. The proposed power amplifier has been realized by using in the input and the output matching network for high power added efficiency. PIN diode has been used to obtain the dual-band of power amplifier. The measured results show that output powers of 42.17 dBm and 41.43 dBm were obtained at 800 MHz and 1900 MHz, respectively. At this frequency, we have obtained the power-added efficiency(PAE) of 67.84 % and 65.31 % in two operation frequencies, respectively.

Improved negative capacitance circuit stable with a low gain margin (이득 여유가 작아도 안정한 개선된 네가티브 커패시턴스 회로)

  • 김영필;황인덕
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.6
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    • pp.68-77
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    • 2003
  • An improved negative capacitance circuit that cancels out input impedance of a front-end in a bioimpedance measurement and operates stably with a low gain margin has been proposed. Since the proposed circuit comprises wide-band operational amplifiers, selecting operational amplifiers is easy, while an operational amplifier of prefer bandwidth should be chosen to apply conventional circuit. Also, since gain margin can be controlled by a feedback resistor connected serially with a feedback capacitor, gain margin is tuneable with a potentiometer. The input impedance of the proposed circuit is two times larger than that of the conventional circuit and 40-times than that without a negative capacitance circuit. Furthermore, closed-loop phase response of the proposed circuit is better than that of the conventional circuit or without a negative capacitance circuit. Above all, for the proposed circuit, the frequency at which a gain peaking occurs is higher than the frequency at which the loop gain becomes a maximum. Thus, the proposed circuit is not affected by a gain peaking and can be operated with a very low gain margin.

A 2.3-2.7 GHz Dual-Mode RF Receiver for WLAN and Mobile WiMAX Applications in $0.13{\mu}m$ CMOS (WLAN 및 Mobile WiMAX를 위한 2.3-2.7 GHz 대역 이중모드 CMOS RF 수신기)

  • Lee, Seong-Ku;Kim, Jong-Sik;Kim, Young-Cho;Shin, Hyun-Chol
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.3
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    • pp.51-57
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    • 2010
  • A dual-mode direct conversion receiver is developed in $0.13\;{\mu}m$ RF CMOS process for IEEE 802.11n based wireless LAN and IEEE 802.16e based mobile WiMAX application. The RF receiver covers the frequency band between 2.3 and 2.7 GHz. Three-step gain control is realized in LNA by using current steering technique. Current bleeding technique is applied to the down-conversion mixer in order to lower the flicker noise. A frequency divide-by-2 circuit is included in the receiver for LO I/Q differential signal generation. The receiver consumes 56 mA at 1.4 V supply voltage including all LO buffers. Measured results show a power gain of 32 dB, a noise figure of 4.8 dB, a output $P_{1dB}$ of +6 dBm over the entire band.

A Slotted Triangular-Patch Type Artificial Transmission Line Coupler (슬롯을 가진 삼각 패치형 인공 전송 선로 결합기)

  • Oh, Song-Yi;Hwang, Hee-Yong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.5
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    • pp.510-515
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    • 2011
  • In this paper, an artificial transmission line coupler with slotted-triangular patches, which is compact and spacesaving structure, is proposed. The proposed structure has specific features of not only convenience for adjusting the characteristic impedance and the phase of its coupled line by varying the lengths of the slots of the artificial transmission lines in designing a coupler but also the maximized coupling value at less than ${\lambda}$/4 electrical length so that it can be designed in compact and small dimensions, while conventional coupled line couplers are generally limited in compact and miniaturized designs by their ${\lambda}$/4 transmission lines. A fabricated 15 dB test-coupler at 2.4 GHz band by proposed design method shows good agreement with theory and simulation.

Dispersion-managed Optical Transmission Links with the Random Distributed SMF Lengths (SMF 길이가 랜덤하게 분포하는 분산 제어 광전송 링크)

  • Lee, Young-Kyo
    • Journal of Advanced Navigation Technology
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    • v.22 no.5
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    • pp.462-466
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    • 2018
  • Optical phase conjugation combining with dispersion management (DM) is promising technique to compensate for signal distortion due to chromatic dispersion and nonlinear Kerr effects of single mode fiber (SMF) in optical communication systems. However the fixed SMF length in every fiber spans usually used in the optical links with optical phase conjugator(OPC) and DM restricts the flexible link configuration. The goal of this paper is to investigate the possibility of the flexible configurations of the ultra-high and long-haul optical transmission systems by using the random distribution of SMF length of each fiber spans consisted of the optical link. It is confirmed that the excellent compensation for the distorted wavelength division multiplexing signals in the optical links with the randomly distribution is obtained in case of the shorter averaged SMF length over all fiber spans. It is also confirmed that the control method of net residual dispersion suitable to good compensation is postcompensation and the extent of net residual dispersion(NRD) is -10 ps/nm in DM optical link consisted of fiber spans with the randomly distributed SMF lengths.

A Switchable Circularly Polarized Microstrip Antenna using Asymmetric U-shaped Slotted Ground Structures (비대칭 U자형 슬롯 접지면을 이용한 편파변환 마이크로스트립 안테나)

  • Lee, Dong-Hyo;Yoon, Won-Sang;Han, Sang-Min;Pyo, Seong-Min;Kim, Young-Sik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.1
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    • pp.85-91
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    • 2010
  • In this paper, a new microstrip antenna using asymmetric U-shaped slotted ground is proposed for a switchable circular polarization sense. The proposed antenna is achieved a circularly polarization from orthogonal E-field distributions with 90 degree phase difference due to the asymmetrical U-shaped slot. Moreover, the circular polarization sense of the proposed antenna can be easily switchable with changing the symmetric plane of the U-shaped slots. As a result, the proposed antenna is implemented by two PIN diodes with two different bias condition for ON/OFF states. The measured axial ratios are about 1.5 dB without the dependence of the polarization sense and 3-dB axial ratio bandwidth are achieved 29 MHz with respect to about 1.2 % at 2.46 GHz operating frequency.

The Circuit Design and Analysis of the Digital Delay-Lock Loop in GPS Receiver System (GPS 수신 시스템에서 디지탈 지연동기 루프 회로 설계 및 분석)

  • 금홍식;정은택;이상곤;권태환;유흥균
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.19 no.8
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    • pp.1464-1474
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    • 1994
  • GPS(Global Positioning System)is a satellite-based navigation system that we can survey where we are, anywhere and anytime. In this paper, delay-lock loop of the receiver which detects the navigation data is theoretically analyzed, and designed using the digital logic circuit. Also logic operations for the synchronization are analyzed. The designed system consists of the correlator which correlates the received C/A code and the generated C/A code in the receiver, the C/A code generator which generates C/A code of selected satellite, and the direct digital clock syntheizer which generates the clock of the C/A code generator to control the C/A code phase and clock rate. From the analyses results of the proposed digital delay-lock loop system, the system has the detection propertied over 90% when its input signal power is above-113.98dB. The influence of input signal variation of digital delay loop, which is the input of A/D converter, is investigated and the performance is analyzed with the variation of threshold level via the computer simulation. The logic simulation results show that the designed system detects precisely the GPS navigation data.

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2단 GM형 맥동관 냉동기 적용 크라이오 펌프 개발

  • Go, Jun-Seok;Park, Seong-Je;Go, Deuk-Yong;Kim, Hyo-Bong;Hong, Yong-Ju;Yeom, Han-Gil;Gang, Min-Jeong;Gang, Sang-Baek
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.85-85
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    • 2011
  • 반도체 생산 공정은 청정 환경을 요구하며, 이를 위해서는 고진공 환경이 필수적인 요소이다. 반도체 생산 라인의 고진공 환경 조성을 위해서는 주로 복합 분자 펌프와 크라이오 펌프가 사용되고 있다. 본 연구에서는 기존의 상용 크라이오 펌프에 사용되던 GM 극저온 냉동기를 맥동관 냉동기로 대체하기 위한 연구를 수행하였다. 맥동관 냉동기는 저온부에 움직이는 부분이 없어 진동이 작고, 신뢰성이 높은 장점이 있어 이를 이용한 크라이오 펌프는 반도체 생산 공정의 공정 정밀도 향상에 기여할 수 있을 것으로 기대된다. 맥동관 냉동기는 크라이오 펌프에 사용하기 위하여 2단으로 구성되며, 저온부가 U자 형상으로 개발되었다. 상용화를 고려하여 로터리 밸브와 위상조절기구가 위치하는 상온부는 일체형으로 제작하였다. 제작된 맥동관 냉동기의 기초 냉각 성능 시험 결과 부하가 없는 조건에서 최저도달온도는 1단과 2단에서 각각 42.53 K과 8.68 K 이었으며, 부하 시험 결과 1단과 2단에서 각각 40 W at 82.97 K, 10 W at 20.51 K의 냉각 능력을 갖는 것으로 측정되었다. 개발된 맥동관 냉동기에 복사차폐막 및 1차, 2차 냉각판을 설치하여 크라이오 펌프를 구성하였고, 기체 질소에 대한 배기 속도 측정 시험을 수행하였다. 배기속도 측정 결과 배기속도는 2차 냉각판의 형상에 크게 영향을 받는 것이 확인되었으며, 약 650 L/의 배기속도를 갖는 것으로 측정되었다. 실험 결과를 바탕으로 크라이오 펌프로 작동시 맥동관 냉동기의 동작 특성 및 배기 속도 향상을 위한 방안을 논의하였다.

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Design of Digital Signal Processor for Ethernet Receiver Using TP Cable (TP 케이블을 이용하는 이더넷 수신기를 위한 디지털 신호 처리부 설계)

  • Hong, Ju-Hyung;SunWoo, Myung-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.8A
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    • pp.785-793
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    • 2007
  • This paper presents the digital signal processing submodule of a 100Base-TX Ethernet receiver to support 100Mbps at TP cable channel. The proposed submodule consists of programmable gain controller, timing recovery, adaptive equalizer and baseline wander compensator. The measured Bit Error Rate is less than $10^{-12}BER$ when continuously receiving data up to 150m. The proposed signal processing submodule is implemented in digital circuits except for PLL and amplifier. The performance improvement of the proposed equalizer and BLW compensator is measured about 1dB compared with the existing architecture that removes BLW using errors of an adaptive equalizer. The architecture has been modeled using Verilog-HDL and synthesized using samsung $0.18{\mu}m$ cell library. The implemented digital signal processing submodule operates at 142.7 MHz and the total number of gates are about 128,528.

Real-time Interactive Control of Magnetic Resonance Imaging System Using High-speed Digital Signal Processors (고속 DSP를 이용한 실시간 자기공명영상시스템 제어)

  • 안창범;김휴정;이흥규
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.5
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    • pp.341-349
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    • 2003
  • A real time interactive controller (spectrometer) for magnetic resonance imaging (MRI) system has been developed using high speed digital signal processors (DSP). The controller generates radio frequency (rf) waveforms and audio frequency gradient waveforms and controls multiple receivers for data acquisition. By employing DSPs having high computational power (e.g., TMS320C670l) real time generation of complicated gradient waveforms and interactive control of selection planes are possible, which are important features in real-time imaging of moving organs, e.g., cardiac imaging. The spectrometer was successfully implemented at a 1.5 Tesla whole body MRI system for clinical application. Performance of the spectrometer is verified by various experiments including high- speed imaging such as fast spin echo (FSE) and echo planar imaging (EPI). These high-speed imaging techniques reduce measurement time, however, usually intensify artifact if there is any systematic phase error or jitter in the synchronization between the transmitter, receiver, and gradients.