• The Journal of the Acoustical Society of Korea
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• v.20 no.4
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• pp.22-28
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• 2001

This paper describes the implementation of a robust speaker position location system using the voice signal received by microphone array. To be robust to the reverberation which is the major factor of the performance degradation, low-frequency phase restoration algorithm which eliminates the influence of reverberations using the low-frequency information of the CPSP function is proposed. The implemented real-time system consists of a general purpose DSP (TMS320C31 of Texas instruments), analog part which contains amplifiers and filters, and digital part which is composed of the external memory and 12-bit A/D converter. In the real conference room environment, the implemented system that was constructed by the proposed algorithms showed better performance than the conventional system. The error of the TDOA estimation reduced more than 15 samples.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.11
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• pp.2267-2272
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• 2009

The six-port direct conversion receiver front-end that is comprised of a carrier recovery and a phase shifter, which gets the same structure with six-port phase correlator using the multi-layer coupled line, was designed and fabricated in this paper. The six-port element that is comprised of the power divider and the hybrid coupler is designed by multi-layer coupled line structure. The multi-coupled structure is utilized as the basic structure in receiver phase correlator, carrier recovery circuit and phase shifter. The receiver front-end with the same multi-layer coupled line structure for the receiver elements shows the simple structure and no difficulty in integration. The fabricated multi-layer coupled six-port receiver front-end re-generates the carrier signal with a constant phase and demodulates the PSK transmission signal.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1820-1822
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• 2001

광파이버 패브리페로 간섭계에서 동작영역을 넓히기 위해 공진기의 길이를 1mm보다 짧은 초소형 간섭계를 구성하고자 하였을 경우, 광출력의 위상변화에 대한 감도가 낮아 전달함수로부터 변화된 위상을 복원하는 과정이 까다로워진다. 이러한 신호복원 과정에는 대부분 신호잡음비를 높여주는 신호처리 수단을 포함하게 되므로 간섭계가 겪은 위상변화를 보다 높은 신뢰성으로 검출하고자 할 때 어떠한 신호처리 방법이 적절한가하는 선택의 문제가 발생된다. 이는 각각의 신호처리방법이 장단점을 가지므로 응용목적에 따른 trade-off가 필요하기 때문이다. 본 연구에서는 참조 간섭계와 센서 간섭계 간의 correlation으로부터 위상을 검출하여 시스템의 잡음을 common mode 잡음으로 처리할 수 있었으며, 디지털 신호처리기법을 응용하여 짧은 공진기로 구성된 센서 간섭계의 위상변화분을 보다 안정적으로 검출하게 되었다.

• The Journal of the Korea Contents Association
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• v.2 no.3
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• pp.80-86
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• 2002

In this paper, we propose the new optical security technique using two phase holograms based on interferometer. The encoded random phase image does not have any information on the original image. Without Hewing the key mask, one cannot decode the encrypted image and regenerate the original image. And the use of two phase only images in the proposed security system leads to maximum optical efficiency (100% in theory). Also they cannot be detected by an intensity detector such as a CCD camera. Computer simulations and optical experiments show performance of the proposed methods.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.2
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• pp.88-97
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• 2003

Computer simulations of the recording and reading of holograms in an 8-bit phase-code multiplexing system are presented. From the computer simulation each recording time of eight holograms is obtained such that the strength of restored holograms is same. An analytic formula to predict the recording times is derived by fitting the formula to the computer simulation data. It is found that our analytic formula can predict the hologram recording time not only in 8-bit system but also in 16-bit and 32-bit systems in an error less than $\pm$8.4%. Optical experiments are also performed in a 4-bit phase code-multiplexing system. It is found that the strength of the restored holograms is more uniform compared with conventional methods.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2020.07a
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• pp.325-326
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• 2020

고해상도의 홀로그램을 얻기 위한 다양한 연구가 지속되고 있다. 본 논문은 고해상도의 위상 홀로그램을 획득하기 위하여 딥러닝 기반의 학습과 복원 결과를 가지고 분석을 진행한다. 사용된 위상 홀로그램은 보편적인 이미지와 값의 범위가 동일하다. SISR(Single Image Super Resolution)에서 좋은 결과를 보인 네트워크를 사용하여 위상 홀로그램에 대한 학습을 진행하였다. 네트워크로 획득한 홀로그램과 원본 홀로그램의 복원 결과를 비교하여, 차이점과 개선해야할 것들에 대해서 심도 있게 분석한다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.27-33
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• 2004

In this paper, we present a carrier recovery circuit using the polarity-decision algorithm that recovers a phase and a frequency error simultaneously. The proposed algorithm catches a frequency error based on a differential of an angular velocity of the signal constellations. Using the differential of a phase error may compensate the frequency error. The symbol prediction method in the proposed algorithm accumulates the symbols, which makes easy to calculate a phase differential. The hardware size of the algerian is small since we use Q data or I only to get phase information. As a result, the algerian shows a pull-in range of normalized frequency error 0.5 under AWGN 15dB.

• Journal of Broadcast Engineering
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• v.28 no.1
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• pp.3-20
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• 2023

A computer-generated hologram (CGH) is a digitally calculated and recorded hologram in which the amplitude and phase information of an image is transmitted in free space. The CGH is in the form of a complex hologram, but it is converted into a phase-only hologram to display through a phase-only spatial light modulator (SLM). In this paper, in the process of including the amplitude information of an object in the phase information, when a technique that includes subsampling such as DPAC is used, we showed experimentally that the bandwidth of the phase-only hologram increases, and as a result, aliasing that was not present in the complex hologram can occur. In addition, it was experimentally shown that it is possible to generate a high-quality phase-only hologram by restricting the spatial frequency range even at a distance where the numerical reconstruction performance is degraded by aliasing.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.10 s.352
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• pp.28-33
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• 2006

An integrated 3.125Gbps clock and data recovery (CDR) circuit is presented. The circuit does not need a reference clock. It has a phase and frequency detector (PFD), which incorporates a bang-bang type 4X oversampling PD and a rotational frequency detector (FD). It also has a ring oscillator type VCO with four delay stages and three zero-offset charge pumps. With a proposed PD and m, the tracking range of 24% can be achieved. Experimental results show that the circuit is capable of recovering clock and data at rates of 3.125Gbps with 0.18 um CMOS technology. The measured recovered clock jitter (p-p) is about 14ps. The CDR has 1.8volt single power supply. The power dissipation is about 140mW.

• The Journal of the Korea Contents Association
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• v.10 no.2
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• pp.72-80
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• 2010

The 1Gbps clock and data recovery (CDR) circuit using the proposed multi-point phase detector (PD) is presented. The proposed phase detector generates up/down signals comparing 3-point that is data transition point and clock rising/falling edge. The conventional PD uses the pulse width modulation (PWM) that controls the voltage controlled oscillator (VCO) using the width of a pulse period's multiple. However, the proposed PD uses the pulse number modulation (PNM) that regulates the VCO with the number of half clock cycle pulse. Therefore the proposed PD can controls VCO preciously and reduces the jitter. The CDR circuit is tested using 1Gbps $2^{31}-1$ pseudo random bit sequence (PRBS) input data. The designed CDR circuit shows that is capable of recovering clock and data at rates of 1Gbps. The recovered clock jitter is 7.36ps at 1GHz and the total power consumption is about 12mW. The proposed circuit is implemented using a 0.18um CMOS process under 1.8V supply.