• Title/Summary/Keyword: 위상검출기

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A Fast Locking Phase-Locked Loop using a New Dual-Slope Phase Frequency Detector and Charge Pump Architecture (위상고정 시간이 빠른 새로운 듀얼 슬로프 위상고정루프)

  • Park, Jong-Ha;Kim, Hoon;Kim, Hee-Jun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.82-87
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    • 2008
  • This paper presents a new fast locking dual-slope phase-locked loop. The conventional dual-slope phase-locked loop consists of two charge pumps and two phase-frequency detectors. In this paper, the dual-slope phase-locked loop was achieved with a charge pump and a phase-frequency detector as adjusting a current of the charge pump according to the phase difference. The proposed circuit was verified by HSPICE simulation with a $0.35{\mu}m$ CMOS standard process parameter. The phase locking time of the proposed dual-slope phase-locked loop was $2.2{\mu}s$ and that of the single-slope phase-locke loop was $7{\mu}s$.

Improvement of the Response Characteristics Using the Fuzzy-PLL Controller (퍼지-PLL 제어기를 이용한 응답특성 개선)

  • Cho, Jeong-Hwan;Seo, Choon-Weon
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.1
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    • pp.175-181
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    • 2005
  • This paper proposes the fuzzy-PLL control system for fast response time and precision control of automation systems. The conventional PLL has not only a jitter noise caused from such a demerit of the wide dead zone, but also a long delay interval that makes a high speed operation unable. In order to solve the problems, the proposed system, which provides the improvement in terms of the control region in high speed and precision control, first used the fuzzy control method for fast response time and when the error reaches the preset value, used the PLL method designing new PFD for precision control. The new designed multi-PFD improves the dead zone, jitter noise and response characteristics, which is consists of P-PFD(Positive edge triggered PFD) and N-PFD(Negative edge triggered PFD) and can improve response characteristics to increase PFD gain.

The enhancement of inner-solid amplitude image by the bandwidth Increment of vertically spatial frequency (축 방향 공간주파수 대역 확장을 통한 고체 내부 진폭 영상의 개선)

  • Oh Dong-in;Kim Hyun;Jun Kye-suk
    • Proceedings of the Acoustical Society of Korea Conference
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    • autumn
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    • pp.245-250
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    • 1999
  • 일반적으로 초음파현미경에서 획득한 초음파 영상은 단일 동작주파수를 사용하여 획득하였으며, 분해능은 동작주파수와 초음파변환기에 의해 결정되는 공간주파수 대역에 의하여 제한되어 졌다. 본 연구에서는 초음파현미경에서 동작주파수를 변화시키면서 획득한 영상들을 합성하여 공간주파수의 축 방향 대역을 확장시킨 개선된 고체 내부의 진폭영상을 얻는 방법에 대하여 연구하였다. 실험에서는 동작주파수가 5MHz이고 비대역폭이 $35\%$인 초음파변환기를 사용하여 초음파현미경 시스템을 구성하였고, 이러한 처리를 위해서는 진폭과 위상영상 데이터가 필요하기 때문에 진폭과 위상을 동시에 획득할 수 있도록 검출기로서 쿼드러춰 검출기를 사용하였다. 시편으로는 알루미늄을 선택하였고, 시료의 표면으로부터 깊이를 다르게 하여 내부에 4개의 원형결함을 제작하였다. 실험결과 단일 주파수를 사용한 경우에는 결함의 형태는 나타났으나, 고체 내부 결함의 깊이와 영상 강도의 변화가 비례하여 나타나지 않는 반면에, 개선된 영상에서는 깊이 변화에 대해서 영상 강도의 변화가 비례하여 출력되었다.

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Improvement of Measurement Accuracy for Absolute Height by Using Two Types of Doppler and Heterodyne Optical Interferometry (도플러방식과 헤테로다인 방식의 광간섭법을 병용한 절대높이 측정 정밀도 향상)

  • Ahn, Geun-Sik;Jhang, Kyung-Young;Moon, Heui-Kwan
    • Journal of the Korean Society for Precision Engineering
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    • v.13 no.6
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    • pp.128-135
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    • 1996
  • This paper proposes a high precision measurement technique to obtain the height of gage block with a few millimeter height. The proposed technique is consisted of two steps : In the first step, laser position transducer and electric micrometer are adopted to obtain a coarse value of the height of gage block, and then, in the second step, heterodyne laser interferometry is adopted to acquire the precision value. A new kind of phase detector is constructed in the low cost for the heterodyne interferometer and its linearity with ${\pm}1%$ is confirmed by experiment. Also measurement error factors due to enviroments are discussed and methodology to reduce such errors is proposed. Preliminary experiments are carried out for the gage blocks of as high as a few millimeter.

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Phase Modulation Optical Delay Line for Ultrafast OCT Application (초고속 OCT응용을 위한 위상변조 광지연단)

  • Hwang Daeseo;Lee Young-Woo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.4
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    • pp.861-864
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    • 2005
  • In this paper, we system the system design and numerical analysis of the ultrafast optical delay line using by optical phase modulator. The numerical analysis carried out with 1310nm, lops laser and electro-optic phase modulator. As the results of numerical analysis, we show a scanning rate of 0.5 GHz and a delay range of 19.0ps. Compare with mechanical delay line, the optical delay line has a high scanning speed and a high repetition rate.

Ultrafast Optical Delay Line by Use of a Phase Modulator for OCT Application (OCT용 초고속 위상 변조 광지연단 설계)

  • Hwang, Dae-seok;Oh, Se-Yong;Lee, Ho-Guen;Lee, Young-Woo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.438-440
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    • 2005
  • 광위상변조기를 이용하여 OCT용 초고속 광지연단을 설계하고 수치해석을 수행하였다. 수치해석은 electro-optic 위상 변조기에 1310nm, 10ps의 펄스폭을 갖는 레이저 광원을 적용하여 수행하였다. 수치해석결과로 500MHz의 변조 주파수일때 19ps의 시간 지연을 얻었으며, 이는 기존의 기계적 검출방식(수십kHz)의 OCT장치에 비해 1000배이상 빠른 검출이 가능할 것으로 예상된다.

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Phase-Shifting System Using Zero-Crossing Detection for use in Fiber-Optic ESPI (영점검출을 이용한 광섬유형 전자 스페클 패턴 간섭계의 위상이동)

  • Park, Hyoung-Jun;Song, Min-Ho;Lee, Jun-Ho
    • Korean Journal of Optics and Photonics
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    • v.16 no.6
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    • pp.516-520
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    • 2005
  • We proposed an efficient phase stepping method for the use in fiber-optic ESPI. To improve phase-stepping accuracy and efficiency, a fiber-optic Michelson interferometer was phase-modulated by a ramp-driven fiber stretcher, resulting in 4$\pi$ phase excursion in the PD interference signal. The zero-crossing points of the signal, which have consecutive $\pi$ phase difference, were carefully detected and used to generate trigger signals for the CCD camera. From the experimental results by using this algorithm, $\pi$/2 phase-stepping errors between the speckle patterns were measured to be less than 0.6 mrad with 100 Hz image capture speed. Also it has been shown that the error from the nonlinear phase modulation and environmental perturbations could be minimized without any feedback algorithm.

A PLL Based 32MHz~1GHz Wide Band Clock Generator Circuit for High Speed Microprocessors (PLL을 이용한 고속 마이크로프로세서용 32MHz~1GHz 광대역 클럭발생회로)

  • Kim, Sang-Kyu;Lee, Jae-Hyung;Lee, Soo-Hyung;Chung, Kang-Min
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.1
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    • pp.235-244
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    • 2000
  • This paper presents a low power PLL based clock geneator circuit for microprocessors. It generates 32MHz${\sim}$1GHz clocks and can be integrated inside microprocessor chips. A high speed D Flip-Flop is designed using dynamic differential latch and a new Phase Frequency Detector(PFD) based on this FF is presented. The PFD enjoys low error characteristics in phase sensitivity and the PLL using this PFD has a low phase error. To improve the linearity of voltage controlled oscillator(VCO) in PLL, the voltage to current converter and current controlled oscillator combination is suggested. The resulting PLL provides wide lock range and extends frequency of generated clocks over 1 GHz. The clock generator is designed by using $0.65\;{\mu}m$ CMOS full custom technology and operates with $11\;{\mu}s$ lock-in time. The power consumption is less than 20mW.

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New Channel Equalizers for Mixed Phase Channel (혼합위상 특성을 고려한 새로운 채널 등화기)

  • 안경승;조주필;백흥기
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.8B
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    • pp.1445-1452
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    • 2000
  • In general, the communication channel can be modeled as inter-symbol interference(ISI) and additive white gaussian noise channel. Viterbi algorithm is optimum detector for transmitted data at transmitter, but it needs large computational complexity. For the sake of this problem, adaptive equalizers are employed for channel equalization which is not attractive for mixed phase channel. In this paper, we propose the effective new channel equalizer for mixed phase channel and show the better performance than previous equalizers.

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Enhanced Dynamic Response of SRF-PLL System in 3 Phase Grid-Connected Inverter (3상 계통연계형 인버터를 위한 SRF-PLL 시스템의 동특성 개선)

  • Choi, Hyeong-Jin;Song, Seung-Ho;Jeong, Seung-Gi;Choi, Ju-Yeop;Choy, Ick
    • Proceedings of the KIPE Conference
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    • 2008.10a
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    • pp.71-73
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    • 2008
  • 급변하는 전압 변동 상황에서 전력 제어를 수행하기 위해서 기존의 동기좌표 위상각 검출 제어기의 특성을 보완할 수 있는 방법을 제시하였다. 실질적인 SRF (Synchronous Reference Frame) - PLL(Phase Locked Loop) 시스템에서 계통 전압은 이상적이지 않고 센서 노이즈 등의 저감을 위하여 측정된 전압에 LPF(Low Pass Filter)를 사용하고 있는데 이러한 LPF의 특성을 고려하여 위상각 제어기의 PI게인을 설정하는 방법을 제시하였으며 가변 게인과 LPF 차단주파수 변동방식을 이용하여 전원 전압 사고의 종류에 따라 위상과 전압이 급변하는 경우에 대하여 시뮬레이션과 실험을 통해 제한된 방법으로 동특성이 개선되고 원하는 응답속도로 설계가 가능함을 보였다.

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