• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.2
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• pp.33-43
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• 2002

현대의 레이다나 통신 시스템에 있어 위상 배열안테나는 필수 구성요소이고 이러한 위상 배열 안테나에는 수 천개의 독립적인 위상제어기가 사용되어지고 있다. 따라서 대량생산이 가능하면서도 성능이 우수한 저손실, 저가격의 True-Time Delay (TTD)를 지원하는 위상천이기가 크게 요구되고 있는 실정이다. 최근 몇 년 동안 MEMS 공정을 이용한 저손실 RF 스위칭 소자와 가변 캐패시터가 성공적으로 개발되었으며 이러한 저손실의 MEMS 스위칭 소자를 이용한 위상천이기 구현이 가능하게 되었다. 본 논문에서는 크기나 전력소모, 삽입손실 등에서 우수한 고주파 특성을 갖는 RF MEMS (Micro-Electro Mechanical System) 스위치에 대해서 간략히 언급하고 이를 이용한 위상천이기와 기존의 위상천이기를 비교 분석하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.8
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• pp.1581-1586
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• 2012

In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8GHz, 7.6dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. The phase noise characteristics of oscillator is improved about 9.5dB compared to one using the general ${\lambda}/4$ microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of ring type DGS, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed ring type DGS resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1399-1400
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• 2008

본 논문에서는 TSMC 0.18um 공정을 이용하여 2.45GHz 대역에서 동작하는 RFID 리더에 적용 할 수 있는 전압제어 발진기를 설계하였다. 위상 잡음 특성 향상을 위해 PMOS, NMOS 소자를 대칭으로 구성한 complementary cross-coupled LC 발진기 구조로 설계 하였고 MOS 배렉터를 이용하여 주파수를 가변 하였다. 또한 공정에서 사용되는 인덕터에 차폐 도체면(PGS:Patterned Ground Shield) 구조를 삽입했을 때 인덕터의 품질계수가 약 5.82% 향상되었고. 이에 따른 위상 잡음은 1MHz offset 주파수에서 PGS를 삽입하지 않는 구조에서는 -102.666dBc/Hz 이며, PGS 구조를 삽입한 구조는 -104.328dBc/Hz로 약1.662dBc 정도의 성능이 향상 되었다. 전압제어 발진기 Core 사이즈는 900um ${\times}$ 590um이고 주파수 가변 범위는 배렉터 전압 1.2${\sim}$2.1V에서 249MHz로 11.4% 특성을 보였다. 1.8V공급전압에서 5.76mW의 전력소모를 보였다.

• Korean Journal of Optics and Photonics
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• v.16 no.4
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• pp.376-383
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• 2005

We designed and fabricated integrated-optic tunable polarization controllers based on $LiNbO_3$ with the Ti-indiffused waveguide along the y-axis utilizing the electro-optic effect. The device consists of $TE↔TM$ mode converters and TE/TM phase shifters. We analyzed the operation principles of each device utilizing transfer matrices based on a Jones matrix and simulated shifting of the center wavelength by inducing voltage. We confirmed experimentally that the fabricated devices control the tunability of the center wavelength and the input SOP.

• Proceedings of the KIPE Conference
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• 2008.10a
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• pp.71-73
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• 2008

급변하는 전압 변동 상황에서 전력 제어를 수행하기 위해서 기존의 동기좌표 위상각 검출 제어기의 특성을 보완할 수 있는 방법을 제시하였다. 실질적인 SRF (Synchronous Reference Frame) - PLL(Phase Locked Loop) 시스템에서 계통 전압은 이상적이지 않고 센서 노이즈 등의 저감을 위하여 측정된 전압에 LPF(Low Pass Filter)를 사용하고 있는데 이러한 LPF의 특성을 고려하여 위상각 제어기의 PI게인을 설정하는 방법을 제시하였으며 가변 게인과 LPF 차단주파수 변동방식을 이용하여 전원 전압 사고의 종류에 따라 위상과 전압이 급변하는 경우에 대하여 시뮬레이션과 실험을 통해 제한된 방법으로 동특성이 개선되고 원하는 응답속도로 설계가 가능함을 보였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.12 s.91
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• pp.1184-1189
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• 2004

A new schematic of quadrature voltage controlled oscillator(QVCO) is designed and fabricated. To obtain quadrature characteristic and low phase noise simultaneously, two differential VCOs are forced to un in quadrature mode by using coupling amplifier with a source degeneration resistor, which is optimized to obtain quadrature accuracy with minimum phase noise degradation. The designed QVCO was fabricated in standard CMOS technology. The measured performance showed the phase noise of below -120 dBc/Hz at 1 MHEz frequency offset, tuning bandwidth of 210 MHz from 2.34 GHz to 2.55 GHz with a tuning voltage varying form 0 to 1.8 V Quadrature error of 0.5 degree and amplitude error of 0.2 dB was measured with conjunction with low-lF mixer. The fabricated QVCO requires 19 mA including 5 mA in the VCO core part fiom a 1.8 V supply.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.398-402
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• 2003

In this paper, a VCDRO(Voltage Control Dielectric Resonator Oscillator) applied to FMCW(Frequency Modulated Continuous Wave)Radar as stable source is implemented and constructed with a MESFET for low noise, a dielectric resonator of high frequency selectivity, and high Q varator diode to obtain a good phase noise performance and stable sweep characteristics. The designed circuits is simulated thrash harmonic balance simulation technique to provide the optimum performance. The measured result of a fabricated VCDRO shows that output is 2.22dBm at 12.05GHz, harmonic suppression -30dBc, phase noise -130dBc at 100kHz offset, and sweep range of varator diode $\pm$18.7MHz, respectively. This oscillator will be available to FMCW Radar.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.2
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• pp.273-279
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• 2013

In this paper, a novel split ring resonator is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed split ring resonator. At the fundamental frequency of 5.8GHz, 7.22dBm output power and -83.5 dBc@100kHz phase noise have been measured for oscillator with split ring resonator. The phase noise characteristics of oscillator is improved about 9.7dB compared to one using the general ${\lambda}$/4 microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of split ring resonator, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed split ring resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10C
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• pp.987-992
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• 2002

In this paper, a new clock and data recovery circuit is proposed for the application of data communication systems requiring ㎓-range clock signals. The circuit is suitable for recovering NRZ data which is widely used for high speed data transmission in ㎓ ranges. The high frequency jitter is one of major performance-limiting factors in PLL, particularly when NRZ data patterns are used. A novel phase detector is able to suppress this noise, and stable clock generation is achieved. Futhermore, the phase detector has an adaptive delay cell removing the dead zone problem and has the optimal characteristics for fast locking. The proposed circuit has a convenience structure that can be easily extended to multi-channels. The circuit is designed based on CMOS 0.25㎛ fabrication process and verified by measurement result.

• Journal of the Korean Institute of Intelligent Systems
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• v.26 no.4
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• pp.273-278
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• 2016

In this paper, chaotic circuit of the Lorentz system using multipliers, operational amplifiers, capacitor, fixed resistor and variable resistor for control has been designed in a electronic circuit. Through PSPICE program, electrical characteristics such as time waveforms, frequency spectra and phase attractors analyzed. And in the special area ($10{\sim}100k{\Omega}$) of the $500k{\Omega}$ control variable resistor, the circuit showed chaotic dynamics. Also, we implemented the circuit in a electronic hardware system with discrete elements. Measured results of the circuit coincided with simulated data.