• Title/Summary/Keyword: 움직임 재추정

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A Scene Change Detection using Motion Estimation in Animation Sequence (움직임 추정을 이용한 애니메이션 영상의 장면전환 검출)

  • Kwak, Sung-Keun
    • Journal of the Korea Computer Industry Society
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    • v.9 no.4
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    • pp.149-156
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    • 2008
  • There is the temporal correlation of a animation sequence between the motion vector of current block and the motion vector of previous block. In this paper, we propose the scene change detection algorithm for block matching using the temporal correlation of the animation sequence and the center-biased property of motion vectors. The proposed algorithm determines the location of a better starting point for the search of an exact motion vector using the point of the smallest SAD(sum of absolute difference) value by the predicted motion vector from the same block of the previous frame and the predictor candidate point on each search region. Simulation results show that the proposed algorithm has better detection performance, such as recall rate, then the existing method. The algorithm has the advantage of speed, simplicity and accuracy. In addition, it requires less amount of storage.

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Video Coding Based on Wavelet Transform and MPEG Coding (웨이블릿 변환과 MPEG 부호화 방법을 사용한 동영상 부호화)

  • 고준혁;조재만;고형화
    • Proceedings of the IEEK Conference
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    • 2000.09a
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    • pp.265-268
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    • 2000
  • 본 논문에서는 영상데이터의 효율적인 압축과 전송을 위하여 이산 웨이블릿 변환(Discret Wavelet Trans-form)과 MPEG 부호화 방법을 이용한 영상 부호화 방법을 제안하였다. 이 방법은 다해상도를 제공하는 계층적 피라미드 구조를 이용한다. DWT로 영상을 여러 개의 밴드들로 분해한 다음, 각 밴드에서 MPEG 부호화기에서 사용하는 방법을 그대로 이용하여, 광범위하게 쓰이는 MPEG 하드웨어나 소프트웨어를 재 사용한다는 이점을 가진다. 기존의 DWT-MPEG 방법[1]은 MPEG 부호화 방법을 쓰기 전에 웨이블릿 필터 분해를 여러번을 하여, 움직임 추정을 정확하게 하지 못하였으나, 제안한 방법은 웨이블릿 필터 분해를 한 번만 하고, MPEG 부호화를 할 때, 웨이블릿 분해를 한번 더 사용하여, 움직임 추정과 보상을 좀 더 개선되게 하였다. 실험 결과, 기존의 DWT-MPEG 방법보다 제안한 방법이 화질이나 압축면에서 좀 더 향상된 결과를 얻을 수가 있었다.

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Joint Optimization of the Motion Estimation Module and the Up/Down Scaler in Transcoders television (트랜스코더의 해상도 변환 모듈과 움직임 추정 모듈의 공동 최적화)

  • Han, Jong-Ki;Kwak, Sang-Min;Jun, Dong-San;Kim, Jae-Gon
    • Journal of Broadcast Engineering
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    • v.10 no.3
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    • pp.270-285
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    • 2005
  • A joint design scheme is proposed to optimize the up/down scaler and the motion vector estimation module in the transcoder system. The proposed scheme first optimizes the resolution scaler for a fixed motion vector, and then a new motion vector is estimated for the fixed scaler. These two steps are iteratively repeated until they reach a local optimum solution. In the optimization of the scaler, we derive an adaptive version of a cubic convolution interpolator to enlarge or reduce digital images by arbitrary scaling factors. The adaptation is performed at each macroblock of an image. In order to estimate the optimal motion vector, a temporary motion vector is composed from the given motion vectors. Then the motion vector is refined over a narrow search range. It is well-known that this refinement scheme provides the comparable performance compared to the full search method. Simulation results show that a jointly optimized system based on the proposed algorithms outperforms the conventional systems. We can also see that the algorithms exhibit significant improvement in the minimization of information loss compared with other techniques.

Reusing Search Window Data and Exploiting Early Termination in Variable Block Size Motion Estimation (가변 블록 크기 움직임 추정 기법에서 탐색 영역 데이터의 재사용과 조기 중단 기법의 적용)

  • Park, Taewook;Hur, Ahrum;Lee, Seongsoo
    • Journal of IKEEE
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    • v.20 no.1
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    • pp.111-114
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    • 2016
  • In HEVC, motion estimation is performed independently for each variable block size. So it requires several times of search window data, and also it is difficult to exploit early termination. In this paper, a new method is proposed to exploit search window data and early termination in variable block size. When applied to TZS algorithm, it reduces pixel comparison and search window data accesses to 1/3.7 ~ 1/2.9 with negligible image quality degradation.

A New Hardware Architecture of High-Speed Motion Estimator for H.264 Video CODEC (H.264 비디오 코덱을 위한 고속 움직임 예측기의 하드웨어 구조)

  • Lim, Jeong-Hun;Seo, Young-Ho;Choi, Hyun-Jun;Kim, Dong-Wook
    • Journal of Broadcast Engineering
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    • v.16 no.2
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    • pp.293-304
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    • 2011
  • In this paper, we proposed a new hardware architecture for motion estimation (ME) which is the most time-consuming unit among H.264 algorithms and designed to the type of intellectual property (IP). The proposed ME hardware consists of buffer, processing unit (PU) array, SAD (sum of absolute difference) selector, and motion vector (MVgenerator). PU array is composed of 16 PUs and each PU consists of 16 processing elements (PUs). The main characteristics of the proposed hardware are that current and reference frames are re-used to reduce the number of access to the external memory and that there is no clock loss during SAD operation. The implemented ME hardware occupies 3% hardware resources of StatixIII EP3SE80F1152C2 which is a FPGA of Altera Inc. and can operate at up to 446.43MHz. Therefore it can process up to 50 frames of 1080p in a second.

Efficient Technique of Motion Vector Re-estimation in Transcoding (트랜스 코딩에서의 효율적인 움직임 벡터 재추정 기법 연구)

  • 한두진;박강서;유희준;김봉곤;박상희
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.53 no.8
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    • pp.602-605
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    • 2004
  • A novel motion vector re-estimation technique for transcoding into lower spatial resolution is proposed. This technique is based on the fact that the block matching error is proportional to the complexity of the reference block with Taylor series expansion. It is shown that the motion vectors re-estimated by the proposed method are closer to optimal ones and offer better quality than those of previous techniques.

Fast Disparity Vector Estimation using Motion vector in Stereo Image Coding (스테레오 영상에서 움직임 벡터를 이용한 고속 변이 벡터 추정)

  • Doh, Nam-Keum;Kim, Tae-Yong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.46 no.5
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    • pp.56-65
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    • 2009
  • Stereoscopic images consist of the left image and the right image. Thus, stereoscopic images have much amounts of data than single image. Then an efficient image compression technique is needed, the DPCM-based predicted coding compression technique is used in most video coding standards. Motion and disparity estimation are needed to realize the predicted coding compression technique. Their performing algorithm is block matching algorithm used in most video coding standards. Full search algorithm is a base algorithm of block matching algorithm which finds an optimal block to compare the base block with every other block in the search area. This algorithm presents the best efficiency for finding optimal blocks, but it has very large computational loads. In this paper, we have proposed fast disparity estimation algorithm using motion and disparity vector information of the prior frame in stereo image coding. We can realize fast disparity vector estimation in order to reduce search area by taking advantage of global disparity vector and to decrease computational loads by limiting search points using motion vectors and disparity vectors of prior frame. Experimental results show that the proposed algorithm has better performance in the simple image sequence than complex image sequence. We conclude that the fast disparity vector estimation is possible in simple image sequences by reducing computational complexities.

A Study on Motion Estimation Encoder Supporting Variable Block Size for H.264/AVC (H.264/AVC용 가변 블록 크기를 지원하는 움직임 추정 부호기의 연구)

  • Kim, Won-Sam;Sohn, Seung-Il
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.10
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    • pp.1845-1852
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    • 2008
  • The key elements of inter prediction are motion estimation(ME) and motion compensation(MC). Motion estimation is to find the optimum motion vectors, not only by using a distance criteria like the SAD, but also by taking into account the resulting number of 비트s in the 비트 stream. Motion compensation is compensate for movement of blocks of current frame. Inter-prediction Encoding is always the main bottleneck in high-quality streaming applications. Therefore, in real-time streaming applications, dedicated hardware for executing Inter-prediction is required. In this paper, we studied a motion estimator(ME) for H.264/AVC. The designed motion estimator is based on 2-D systolic array and it connects processing elements for fast SAD(Sum of Absolute Difference) calculation in parallel. By providing different path for the upper and lower lesion of each reference data and adjusting the input sequence, consecutive calculation for motion estimation is executed without pipeline stall. With data reuse technique, it reduces memory access, and there is no extra delay for finding optimal partitions and motion vectors. The motion estimator supports variable-block size and takes 328 cycles for macro-block calculation. The proposed architecture is local memory-free different from paper [6] using local memory. This motion estimation encoder can be applicable to real-time video processing.

The Design of Motion Estimation Hardware for High-Performance HEVC Encoder (고성능 HEVC 부호기를 위한 움직임추정 하드웨어 설계)

  • Park, Seungyong;Jeon, Sunghun;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.3
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    • pp.594-600
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    • 2017
  • This paper proposes a global search based motion estimation algorithm for high performance HEVC encoder and its hardware architecture. To eliminate temporal redundancy, motion estimation in HEVC inter-view prediction uses global search and fast search algorithm to search for a predicted block having a high correlation with the current PU in an interpolated reference picture. The global search method predicts the motion of all candidate blocks in a given search area, thus ensuring optimal results, but has a disadvantage of large computation time. Therefore we propose a new algorithm that reduces computational complexity by reusing SAD operation in global search to reduce computation time of inter prediction. As a result of applying the proposed algorithm to standard software HM16.12, the computation time was reduced by 61%, BDBitrate by 11.81%, and BDPSNR by about 0.5% compared with the existing search algorithm. As a result of hardware design, the maximum operating frequency is 255 MHz and the total number of gates is 65.1K.

A Study on Frame Interpolation and Nonlinear Moving Vector Estimation Using GRNN (GRNN 알고리즘을 이용한 비선형적 움직임 벡터 추정 및 프레임 보간연구)

  • Lee, Seung-Joo;Bang, Min-Suk;Yun, Kee-Bang;Kim, Ki-Doo
    • Journal of IKEEE
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    • v.17 no.4
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    • pp.459-468
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    • 2013
  • Under nonlinear characteristics of frames, we propose the frame interpolation using GRNN to enhance the visual picture quality. By full search with block size of 128x128~1x1 to reduce blocky artifact and image overlay, we select the frame having block of minimum error and re-estimate the nonlinear moving vector using GRNN. We compare our scheme with forward(backward) motion compensation, bidirectional motion compensation when the object movement is large or the object image includes zoom-in and zoom-out or camera focus has changed. Experimental results show that the proposed method provides better performance in subjective image quality compared to conventional MCFI methods.