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http://dx.doi.org/10.6109/jkiice.2017.21.3.594

The Design of Motion Estimation Hardware for High-Performance HEVC Encoder  

Park, Seungyong (Department of Information and Communication Engineering, Hanbat National University)
Jeon, Sunghun (Department of Information and Communication Engineering, Hanbat National University)
Ryoo, Kwangki (Department of Information and Communication Engineering, Hanbat National University)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.21, no.3, 2017 , pp. 594-600 More about this Journal
Abstract
This paper proposes a global search based motion estimation algorithm for high performance HEVC encoder and its hardware architecture. To eliminate temporal redundancy, motion estimation in HEVC inter-view prediction uses global search and fast search algorithm to search for a predicted block having a high correlation with the current PU in an interpolated reference picture. The global search method predicts the motion of all candidate blocks in a given search area, thus ensuring optimal results, but has a disadvantage of large computation time. Therefore we propose a new algorithm that reduces computational complexity by reusing SAD operation in global search to reduce computation time of inter prediction. As a result of applying the proposed algorithm to standard software HM16.12, the computation time was reduced by 61%, BDBitrate by 11.81%, and BDPSNR by about 0.5% compared with the existing search algorithm. As a result of hardware design, the maximum operating frequency is 255 MHz and the total number of gates is 65.1K.
Keywords
HEVC; Motion Estimation; Encoder; Full Search;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
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1 H. Jung, and K. Ryoo, "An Intra Prediction Hardware Architecture Design for Computational Complexity Reduction of HEVC Decoder," Journal of the Korea Institute of Information and Communication Engineering, vol. 17, no. 5, pp. 1203-1212, May 2013.   DOI
2 S. Park, H. Jo, and K. Ryoo, "The Design of Transform and Quantization Hardware for High-Performance HEVC Encoder," Journal of the Korea Institute of Information and Communication Engineering, vol. 20, no. 2, pp.327-334, Feb. 2016.   DOI
3 N. Purnachand, L. N. Alves, and A. Navarro, "Improvements to TZ search motion estimation algorithm for multiview video coding," in International Conference on System Signals and Image Processing(IWSSIP) 19th, Apr. 2012.
4 J. Zhang, B. Li, and H. Li, "An Efficeient Fast Mode Decision Method for Inter Prediction in HEVC," IEEE Transactions Circuits System Video Technology, vol. 26, no. 8, pp. 1502-1515, Aug. 2015.   DOI
5 S. Ahn, M. Kim, and S. Park. "Fast decision of CU partitioning based on SAO parameter, motion and PU/TU split information for HEVC," in Proceeding of Picture Coding Symposium, pp. 113-116. Dec. 2013.
6 F. Sampaio, S. Bampi, M. Grellert, L. Agostini, and J. Mattos, "Motion vectors merging: low complexity prediction unit decision heuristic for the inter-prediction of HEVC encoders," in IEEE International Conference on Multimedia and Expo (ICME), pp. 657-662, July. 2012.
7 Z. Liu, S. Goto, and T. Ikenaga, "Optimization of Propagate Partial SAD and SAD tree motion estimation hardwired engine for H.264," IEEE International Conference on Computer Design, pp. 328-333, Oct. 2008.
8 P. Nalluri, L. N. Alves, and A. Navarro, "High Speed SAD Architectures for Variable block size Motion Estimation In HEVC Video Coding," in Proceeding. IEEE International Conference on ICIP Circuits, pp. 1233- 1237, Oct. 2014.