• Title/Summary/Keyword: 연산 지도

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Multiple-valued FFT processor design using current mode CMOS (전류 모드 CMOS를 이용한 다치 FFT 연산기 설계)

  • Song, Hong-Bok;Seo, Myung-Woong
    • Journal of the Korean Institute of Intelligent Systems
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    • v.12 no.2
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    • pp.135-143
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    • 2002
  • In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast courier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like {0, 1, 2, 3}. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used toed as LUT(Lood Up Table).

An Analysis on the Competence and the Methods of Problem Solving of Children at the Before of School Age in Four Operations Word Problems (학령 전 아이들의 사칙연산 문장제 해결 능력과 방법 분석)

  • Lee, Dae-Hyun
    • Journal of the Korean School Mathematics Society
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    • v.13 no.3
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    • pp.381-395
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    • 2010
  • The purpose of this paper is to examine the competence and the methods of problem solving in four operations word problems based on the informal knowledges by five-year-old children. The numbers which are contained in problems consist of the numbers bigger than 5 and smaller than 10. The subjects were 21 five-year-old children who didn't learn four operations. The interview with observation was used in this research. Researcher gave the various materials to children and permitted to use them for problem solving. And researcher read the word problems to children and children solved the problems. The results are as follows: five-year-old children have the competence of problem solving in four operations word problems. They used mental computation or counting all materials strategy in addition problem. The methods of problem solving were similar to that of addition in subtraction, multiplication and division, but the rate of success was different. Children performed poor1y in division word problems. According to this research, we know that kindergarten educators should be interested in children's informal knowledges of four operations including shapes, patterns, statistics and probability. For this, it is needed to developed the curriculum and programs for informal mathematical experiences.

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Design of GeoPhoto Contents Markup Language for u-GIS Contents (u-GIS 콘텐츠를 위한 GeoPhoto 콘텐츠 언어의 설계)

  • Park, Jang-Yoo;Nam, Kwang-Woo;Jin, Heui-Chae
    • Journal of Korea Spatial Information System Society
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    • v.11 no.1
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    • pp.35-42
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    • 2009
  • This paper proposes a new GeoPhoto contents markup language that can create u-GIS contents by using the spatial photos. GeoPhoto contents markup language has designed the GeoPhoto contents model and markup language for contents that can be used the spatial photos information. GeoPhoto con tents markup language is represented by the convergence of GIS information, location information, photos information respectively. GeoPhoto contents markup language to provide a variety of pictures related to the content model consists of GeoPhoto contents model and operations between the GeoPhoto contents. GeoPh oto contents model supports GeoPhoto model, CubicPhoto model, Photo model and SequenceGeoPhoto mod el. In addition, this paper propose the Annotation operation, Enlargement operation and Overlay operation for represent the GeoPhoto contents. GeoPhoto Contents Markup Language has the advantage of supportin g user custom contents model of u-GIS.

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Applying Static Analysis to Improve Performance of Programs using Flash Memory Storage (플래시 메모리 저장 장치를 사용하는 프로그램의 성능 향상을 위한 정적 분석 기법의 응용)

  • Paik, Joon-Young;Cho, Eun-Sun
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.12
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    • pp.1177-1187
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    • 2010
  • Flash memory becomes popular storage for small devices due to its efficiency, portability, low power consumption and large capacity. Unlike on hard disks, however, write operation on flash memory is much more expensive than read operation, so that it is critical for performance enhancement to reduce the number of executions of write operation. This paper proposes static analysis to rewrite a program to reduce the total number of write operations by merging writable data in a minimum number of pages. To achieve this, we collect information about writable areas by static analysis, and about frequently executed paths by profiling for practicality, and combine both to rewrite the application program to reallocate data. The performance enhancement gained from the proposed methods is shown using a FAST simulator.

ACDE2: An Adaptive Cauchy Differential Evolution Algorithm with Improved Convergence Speed (ACDE2: 수렴 속도가 향상된 적응적 코시 분포 차분 진화 알고리즘)

  • Choi, Tae Jong;Ahn, Chang Wook
    • Journal of KIISE
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    • v.41 no.12
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    • pp.1090-1098
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    • 2014
  • In this paper, an improved ACDE (Adaptive Cauchy Differential Evolution) algorithm with faster convergence speed, called ACDE2, is suggested. The baseline ACDE algorithm uses a "DE/rand/1" mutation strategy to provide good population diversity, and it is appropriate for solving multimodal optimization problems. However, the convergence speed of the mutation strategy is slow, and it is therefore not suitable for solving unimodal optimization problems. The ACDE2 algorithm uses a "DE/current-to-best/1" mutation strategy in order to provide a fast convergence speed, where a control parameter initialization operator is used to avoid converging to local optimization. The operator is executed after every predefined number of generations or when every individual fails to evolve, which assigns a value with a high level of exploration property to the control parameter of each individual, providing additional population diversity. Our experimental results show that the ACDE2 algorithm performs better than some state-of-the-art DE algorithms, particularly in unimodal optimization problems.

Efficient Attribute Based Digital Signature that Minimizes Operations on Secure Hardware (보안 하드웨어 연산 최소화를 통한 효율적인 속성 기반 전자서명 구현)

  • Yoon, Jungjoon;Lee, Jeonghyuk;Kim, Jihye;Oh, Hyunok
    • Journal of KIISE
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    • v.44 no.4
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    • pp.344-351
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    • 2017
  • An attribute based signature system is a cryptographic system where users produce signatures based on some predicate of attributes, using keys issued by one or more attribute authorities. If a private key is leaked during signature generation, the signature can be forged. Therefore, signing operation computations should be performed using secure hardware, which is called tamper resistant hardware in this paper. However, since tamper resistant hardware does not provide high performance, it cannot perform many operations requiring attribute based signatures in a short time frame. This paper proposes a new attribute based signature system using high performance general hardware and low performance tamper resistant hardware. The proposed signature scheme consists of two signature schemes within a existing attribute based signature scheme and a digital signature scheme. In the proposed scheme, although the attribute based signature is performed in insecure environments, the digital signature scheme using tamper resistant hardware guarantees the security of the signature scheme. The proposed scheme improves the performance by 11 times compared to the traditional attribute based signature scheme on a system using only tamper resistant hardware.

A Study on High Speed LDPC Decoder Algorithm based on dc saperation (dc 분리 기반의 고속 LDPC 복호 알고리즘에 관한 연구)

  • Kwon, Hae-Chan;Kim, Tae-Hoon;Jung, Ji-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.9
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    • pp.2041-2047
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    • 2013
  • In this paper, we proposed high speed LDPC decoding algorithm based on DVB-S2 standard. For implementing the high speed LDPC decoder, HSS algorithm which reduce the iteration numbers without performance degradation is applied. In HSS algorithm, check node update units are update at the same time of bit node update. HSS can be accelerated to the decoding speed because it does not need to separate calculation of the bit nodes, However, check node calculation blocks need many clocks because of just one memory is used. Therefore, this paper proposed dc-split memory structure in order to reduced the delay and high speed decoder is possible. Finally, this paper presented maximum split memory and throughput for various coding rates in DVB-S2 standard.

An Analysis on the Students' Understanding in Concept and Operations of Decimal Fraction (초등학생들의 소수 개념과 그 연산에 대한 이해도 분석)

  • Moon, Beomshik;Lee, DaeHyun
    • Journal of Elementary Mathematics Education in Korea
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    • v.18 no.2
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    • pp.237-255
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    • 2014
  • The purpose of this study is to investigate elementary school students' understanding the concept and operations of decimal fraction. The survey research was performed for this study. This survey was done by selecting 156 students. Questionnaire were made in five areas with reference to the 2007 revised mathematics curriculum. Five areas were the concept of decimal fraction, the addition, the subtraction, the multiplication and the division of decimal fraction. The results of such analysis are as follow: The analyzed result of understanding about concepts and operation of decimal fraction showed a high rate of correct answer, more than 85%. Students thought that multiplication and division of decimal fraction is more difficult than addition, subtraction, concept of decimal fraction. As the learning about concepts and operation of decimal fraction progress, the learning gap is bigger. Effort to reduce the learning deficits are needed in the lower grades. Mathematics is the study of the hierarchical. Learning deficits in low-level interfere with the learning in next-level. Therefore systematic supplementary guidance for a natural number and decimal fraction in low-level is needed. And understanding concepts and principles of calculations should be taught first.

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Critical Path Analysis for Codesign of Public Key Crypto-Systems (공개키 연산기의 효율적인 통합 설계를 위한 임계 경로 분석)

  • Lee Wan bok;Roh Chang hyun;Ryu Dae hyun
    • Journal of Korea Multimedia Society
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    • v.8 no.1
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    • pp.79-87
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    • 2005
  • In e-commerce applications, a public key cryptosystem is an important and indispensible element for the basic security operations such as authentication, digital signaturing, and key distribution. In wired network environments, the public key infrastructure certificate, which is based on X.509 specification, has been widely used. On the other hand, it still remains difficult to use the certificate information in wireless network environments due to the inherent limitations of the hand-held devices such as low computational power and short battery life. In this paper, we facilitate a codesign approach by implementing a software public-key cryptosystem and classifying its internal computation overheads quantitatively using a software profiling technique. Moreover, we propose a method to analyze the profiled data and apply it to the problem of software/hardware partitioning in a codesign approach. As an illustrative example, we analyze the computational overheads of an EC-Elfagamal application and examine a critical computational path.

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Efficient Processing of Temporal Aggregation including Selection Predicates (선택 프레디키트를 포함하는 시간 집계의 효율적 처리)

  • Kang, Sung-Tak;Chung, Yon-Dohn;Kim, Myoung-Ho
    • Journal of KIISE:Databases
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    • v.35 no.3
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    • pp.218-230
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    • 2008
  • The temporal aggregate in temporal databases is an extension of the conventional aggregate to include the time on the range condition of aggregation. It is a useful operation for Historical Data Warehouses, Call Data Records, and so on. In this paper, we propose a structure for the temporal aggregation with multiple selection predicates, called the ITA-tree, and an aggregate processing method based on the structure. In the ITA-tree, we transform the time interval of a record into a single value, called the T-value. Then, we index records according to their T-values like a $B^+$-tree style. For possible hot-spot situations, we also propose an improvement of the ITA-tree, called the eITA-tree. Through analyses and experiments, we evaluate the performance of the proposed method.