• Title/Summary/Keyword: 언어 모델링

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An Efficient Array Algorithm for VLSI Implementation of Vector-radix 2-D Fast Discrete Cosine Transform (Vector-radix 2차원 고속 DCT의 VLSI 구현을 위한 효율적인 어레이 알고리듬)

  • 신경욱;전흥우;강용섬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.12
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    • pp.1970-1982
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    • 1993
  • This paper describes an efficient array algorithm for parallel computation of vector-radix two-dimensional (2-D) fast discrete cosine transform (VR-FCT), and its VLSI implementation. By mapping the 2-D VR-FCT onto a 2-D array of processing elements (PEs), the butterfly structure of the VR-FCT can be efficiently importanted with high concurrency and local communication geometry. The proposed array algorithm features architectural modularity, regularity and locality, so that it is very suitable for VLSI realization. Also, no transposition memory is required, which is invitable in the conventional row-column decomposition approach. It has the time complexity of O(N+Nnzp-log2N) for (N*N) 2-D DCT, where Nnzd is the number of non-zero digits in canonic-signed digit(CSD) code, By adopting the CSD arithmetic in circuit desine, the number of addition is reduced by about 30%, as compared to the 2`s complement arithmetic. The computational accuracy analysis for finite wordlength processing is presented. From simulation result, it is estimated that (8*8) 2-D DCT (with Nnzp=4) can be computed in about 0.88 sec at 50 MHz clock frequency, resulting in the throughput rate of about 72 Mega pixels per second.

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A Study on Performance Evaluation of Hidden Markov Network Speech Recognition System (Hidden Markov Network 음성인식 시스템의 성능평가에 관한 연구)

  • 오세진;김광동;노덕규;위석오;송민규;정현열
    • Journal of the Institute of Convergence Signal Processing
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    • v.4 no.4
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    • pp.30-39
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    • 2003
  • In this paper, we carried out the performance evaluation of HM-Net(Hidden Markov Network) speech recognition system for Korean speech databases. We adopted to construct acoustic models using the HM-Nets modified by HMMs(Hidden Markov Models), which are widely used as the statistical modeling methods. HM-Nets are carried out the state splitting for contextual and temporal domain by PDT-SSS(Phonetic Decision Tree-based Successive State Splitting) algorithm, which is modified the original SSS algorithm. Especially it adopted the phonetic decision tree to effectively express the context information not appear in training speech data on contextual domain state splitting. In case of temporal domain state splitting, to effectively represent information of each phoneme maintenance in the state splitting is carried out, and then the optimal model network of triphone types are constructed by in the parameter. Speech recognition was performed using the one-pass Viterbi beam search algorithm with phone-pair/word-pair grammar for phoneme/word recognition, respectively and using the multi-pass search algorithm with n-gram language models for sentence recognition. The tree-structured lexicon was used in order to decrease the number of nodes by sharing the same prefixes among words. In this paper, the performance evaluation of HM-Net speech recognition system is carried out for various recognition conditions. Through the experiments, we verified that it has very superior recognition performance compared with the previous introduced recognition system.

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Performance Evaluation of Workstation System within ATM Integrated Service Switching System using Mean Value Analysis Algorithm (MVA 알고리즘을 이용한 ATM 기반 통합 서비스 교환기 내 워크스테이션의 성능 평가)

  • Jang, Seung-Ju;Kim, Gil-Yong;Lee, Jae-Hum;Park, Ho-Jin
    • Journal of KIISE:Computing Practices and Letters
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    • v.6 no.4
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    • pp.421-429
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    • 2000
  • In present, ATM integrated switching system has been developed to a mixed modules that complexed switching system including maintenance, operation based on B-ISDN/LAN service and plug-in module, , which runs on workstation computer system. Meanwhile, workstation has HMI operation system feature including file system management, time management, graphic processing, TMN agent function. The workstation has communicated with between ATM switching module and clients. This computer system architecture has much burden messages communication among processes or processor. These messages communication consume system resources which are socket, message queue, IO device files, regular files, and so on. Therefore, in this paper we proposed new performance modeling with this system architecture. We will analyze the system bottleneck and improve system performance. In addition, in the future, the system has many additional features should be migrated to workstation system, we need previously to evaluate system bottleneck and redesign it. In performance model, we use queueing network model and the simulation package is used PDQ and C-program.

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A Hierarchical Group-Based CAVLC Decoder (계층적 그룹 기반의 CAVLC 복호기)

  • Ham, Dong-Hyeon;Lee, Hyoung-Pyo;Lee, Yong-Surk
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.2
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    • pp.26-32
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    • 2008
  • Video compression schemes have been developed and used for many years. Currently, H.264/AVC is the most efficient video coding standard. The H.264/AVC baseline profile adopts CAVLC(Context-Adaptive Variable Length Coding) method as an entropy coding method. CAVLC gives better performance in compression ratios than conventional VLC(Variable Length Coding). However, because CAVLC decoder uses a lot of VLC tables, the CAVLC decoder requires a lot of area in terms of hardware. Conversely, since it must look up the VLC tables, it gives a worse performance in terms of software. In this paper, we propose a new hierarchical grouping method for the VLC tables. We can obtain an index of codes in the reconstructed VLC tables by simple arithmetic operations. In this method, the VLC tables are accessed just once in decoding a symbol. We modeled the proposed algorithm in C language, compiled under ARM ADS1.2 and simulated it with Armulator. Experimental results show that the proposed algorithm reduces execution time by about 80% and 15% compared with the H.264/AVC reference program JM(Joint Model) 10.2 and the arithmetic operation algorithm which is recently proposed, respectively.

Preference-based Supply Chain Partner Selection Using Fuzzy Ontology (퍼지 온톨로지를 이용한 선호도 기반 공급사슬 파트너 선정)

  • Lee, Hae-Kyung;Ko, Chang-Seong;Kim, Tai-Oun
    • Journal of Intelligence and Information Systems
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    • v.17 no.1
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    • pp.37-52
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    • 2011
  • Supply chain management is a strategic thinking which enhances the value of supply chain and adapts more promptly for the changing environment. For the seamless partnership and value creation in supply chains, information and knowledge sharing and proper partner selection criteria must be applied. Thus, the partner selection criteria are critical to maintain product quality and reliability. Each part of a product is supplied by an appropriate supply partner. The criteria for selecting partners are technological capability, quality, price, consistency, etc. In reality, the criteria for partner selection may change according to the characteristics of the components. When the part is a core component, quality factor is the top priority compared to the price. For a standardized component, lower price has a higher priority. Sometimes, unexpected case occurs such as emergency order in which the preference may shift on the top. Thus, SCM partner selection criteria must be determined dynamically according to the characteristics of part and its context. The purpose of this research is to develop an OWL model for the supply chain partnership depending on its context and characteristics of the parts. The uncertainty of variable is tackled through fuzzy logic. The parts with preference of numerical value and context are represented using OWL. Part preference is converted into fuzzy membership function using fuzzy logic. For the ontology reasoning, SWRL (Semantic Web Rule Language) is applied. For the implementation of proposed model, starter motor of an automobile is adopted. After the fuzzy ontology is constructed, the process of selecting preference-based supply partner for each part is presented.

An Improved SysML-Based Failure Model for Safety Verification By Simulation (시뮬레이션을 통해 안전성 검증을 위한 개선된 SysML 기반 고장 모델)

  • Kim, Chang-Won;Lee, Jae-Chon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.10
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    • pp.410-417
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    • 2018
  • System design errors are more likely to occur in modern systems because of their steadily increasing size and complexity. Failures due to system design errors can cause safety-related accidents in the system, resulting in extensive damage to people and property. Therefore, international standards organizations, such as the U.S. Department of Defense and the International Electrotechnical Commission, have established international safety standards to ensure system safety, and recommend that system design and safety activities should be integrated. Recently, the safety of a system has been verified by modeling through a model-based system design. On the other hand, system design and safety activities have not been integrated because the model for system design and the failure model for safety analysis and verification were developed using different modeling language platforms. Furthermore, studies using UML or SysML-based failure models for deriving safety requirements have shown that these models have limited applicability to safety analysis and verification. To solve this problem, it is essential to extend the existing methods for failure model implementation. First, an improved SysML-based failure model capable of integrating system design and safety verification activities should be produced. Next, this model should help verify whether the safety requirements derived via the failure model are reflected properly in the system design. Therefore, this paper presents the concept and method of developing a SysML-based failure model for an automotive system. In addition, the failure model was simulated to verify the safety of the automotive system. The results show that the improved SysML-based failure model can support the integration of system design and safety verification activities.

Analysis of Korean Spontaneous Speech Characteristics for Spoken Dialogue Recognition (대화체 연속음성 인식을 위한 한국어 대화음성 특성 분석)

  • 박영희;정민화
    • The Journal of the Acoustical Society of Korea
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    • v.21 no.3
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    • pp.330-338
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    • 2002
  • Spontaneous speech is ungrammatical as well as serious phonological variations, which make recognition extremely difficult, compared with read speech. In this paper, for conversational speech recognition, we analyze the transcriptions of the real conversational speech, and then classify the characteristics of conversational speech in the speech recognition aspect. Reflecting these features, we obtain the baseline system for conversational speech recognition. The classification consists of long duration of silence, disfluencies and phonological variations; each of them is classified with similar features. To deal with these characteristics, first, we update silence model and append a filled pause model, a garbage model; second, we append multiple phonetic transcriptions to lexicon for most frequent phonological variations. In our experiments, our baseline morpheme error rate (WER) is 31.65%; we obtain MER reductions such as 2.08% for silence and garbage model, 0.73% for filled pause model, and 0.73% for phonological variations. Finally, we obtain 27.92% MER for conversational speech recognition, which will be used as a baseline for further study.

A Study on the Performance Analysis of Cache Coherence Protocols in a Multiprocessor System Using HiPi Bus (HiPi 버스를 사용한 멀티프로세서 시스템에서 캐쉬 코히어런스 프로토콜의 성능 평가에 관한 연구)

  • 김영천;강인곤;황승욱;최진규
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.1
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    • pp.57-68
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    • 1993
  • In this paper, we describe a multiprocessor system using the HiPi bus with pended protocol and multiple cache memories, and evalute the performance of the multiprocessor system in terms of processor utilization for various cache coherence protocols. The HiPi bus is delveloped as the shared bus of TICOM II which is a main computer system to establish a nation-wide computing network in ETRI. The HiPi bus has high data transfer rate, but it doesn't allow cache-to-cache transfer. In order to evaluate the effect of cache-to-cache transfer upon the performance of system and to choose a best-performed protocol for HiPi bus, we simulate as follows: First, we analyze the performance of multiprocessor system with HiPi bus in terms of processor utilizatIOn through simulation. Each of cache coherence protocol is described by state transition diagram, and then the probability of each state is calculated by Markov steady state. The calculated probability of each state is used as input parameters of simulation, and modeling and simulation are implemented and performed by using SLAM II graphic symbols and language. Second, we propose the HiPi bus which supports cache-to-cache transfer, and analyze the performance of multiprocessor system with proposed HiPi bus in terms of processor utilization through simulation. Considered cache coherence protocols for the simulation are Write-through, Write-once, Berkely, Synapse, Illinois, Firefly, and Dragon.

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A Study on the Reliable Video Transmission Through Source/Channel Combined Optimal Quantizer for EREC Based Bitstream (EREC 기반 비트열을 위한 Source-Channel 결합 최적 양자화기 설계 및 이를 통한 안정적 영상 전송에 관한 연구)

  • 김용구;송진규;최윤식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.12B
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    • pp.2094-2108
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    • 2000
  • 오류를 수반하는 통신망을 통한 멀티미디어 데이터의 응용은 최근 그 수요가 급증하고 있다. 하지만 그 구현은 많은 문제점들을 야기하는데, 전송된 비디오 데이터에 발생한 오류를 처리하는 문제가 그 중 하나이다. 이는 압축된 비트열에 발생한 오류가 영상의 시-공간 방향으로 심각한 전파 현상을 수반하기 때문이다. 이러한 심각한 오류 전파를 완화하기 위해 본 논문에서는 EREC라 알려진 오류 제한 기법을 적용하고, 적용된 EREC의 오류 전파 특성을 분석하였다. 이를 통해, 압축 부호화된 하나의 기본 블록 (매크로 블록)이 복호시 오류가 생길 확률을 추정하였으며, 추정된 확률의 근사를 통해 양 끝단(전송단과 수신단)에서의 비디오 화질 열화를 예측하였다. 추정 확률의 근사는 매 기본 블록에서 발생된 비트수에 대한 그 기본 블록이 복호시 오류가 생길 확률을 간단한 1차식을 통한 선형 회귀법으로 모델링 되었으며, 따라서 간단한 방법을 통해 양 끝단의 화질 열화를 효과적으로 예측할 수 있었다. 부호화된 비트열이 전송 오류에 보다 강인하게 되도록 하기 위해, 본 논문에서 개발된 화질 열화 모델을 양자화기 선택에 적용함으로써, 새로운 최적 양자화 기법을 제시하였다. 본 논문에서 제안된 최적 양자화 기법은, 기존의 양자기 최적화 기법들과는 달리, 복호단에서의 복원 영상 화질이 주어진 비트율에서 최적이 되도록 양자화를 수행한다. H.263 비디오 압축 규격에 적용한 제안 양자화 기법의 실험 결과를 통해, 제안 기법이 매우 적은 계산상의 부하를 비용으로 객관적 화질은 물론 주관적 화질까지 크게 개선할 수 있음을 확인할 수 있었다.내었다.Lc. lacti ssp. lactis의 젖산과 초산의 생성량은 각각 0.089, 0.003과 0.189, 0.003M이었다. 따라서 corn steep liquor는 L. fermentum와 Lc. lactis ssp, lactis 의 생장을 위해 질소 또는 탄소 공급원으로서 배지에 첨가 될 수 있는 우수한 농업 부산물로 판단되었다.징하며 WLWQ에 적용되는 몇 가지 제약을 관찰하고 이를 일반적인 언어원리로 설명한다. 첫째, XP는 주어로만 해석되는데 그 이유는 XP가 목적어 혹은 부가어 등 다른 기능을 할 경우 생략 부위가 생략의 복원 가능선 원리 (the deletion-up-to recoverability principle)를 위배하기 때문이다. 둘째, WLWQ가 내용 의문문으로만 해석되는데 그 이유는 양의 공리(the maxim of quantity: Grice 1975) 때문이다. 평서문으로 해석될 경우 WP에 들어갈 부분이 XP의 자질의 부분집합에 불과하므로 명제가 아무런 정보제공을 하지 못한다. 반면 의문문 자체는 정보제공을 추구하지 않으므로 앞에서 언급한 양의 공리로부터 자유롭다. 셋째, WLWQ의 XP는 주제어 표지 ‘는/-은’을 취하나 주어표지 ‘가/-이’는 취하지 못한다(XP-는/-은 vs. XP-가/-이). 이는 IP내부 에 비공범주의 존재 여부에 따라 C의 음운형태(PF)가 시성이 정해진다는 가설로 설명하고자 했다. WLWQ에 대한 우리의 논의가 옳다면, 본 논문은 다음과 같은 이론적 함의를 기닌다. 첫째, WLWQ의 존재는 생략에 대한 두 이론 즉 LF 복사 이론과 PF 삭제 이론

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An Object-Oriented Analysis and Design Methodology for Security of Web Applications (웹 응용 보안을 위한 객체지향 분석·설계 방법론)

  • Joo, Kyung-Soo;Woo, Jung-Woong
    • Journal of Internet Computing and Services
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    • v.14 no.4
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    • pp.35-42
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    • 2013
  • Nowadays many tasks are performed using the Web. Accordingly, many web-based application systems with various and complicated functions are being requested. In order to develop such web-based application systems efficiently, object-oriented analysis and design methodology is used, and Java EE(Java Platform, Enterprise Edition) technologies are used for its implementation. The security issues have become increasingly important. For such reasons, Java EE provides mechanism related to security but it does not provide interconnections with object-oriented analysis and design methodology for developing web application system. Consequently, since the security method by Java EE mechanism is implemented at the last step only, it is difficult to apply constant security during the whole process of system development from the requirement analysis to implementation. Therefore, this paper suggests an object-oriented analysis and design methodology emphasized in the security for secure web application systems from the requirement analysis to implementation. The object-oriented analysis and design methodology adopts UMLsec, the modeling language with an emphasis on security for the requirement analysis and system analysis & design with regard to security. And for its implementation, RBAC (Role Based Access Control) of servlet from Java EE technologies is used. Also, the object-oriented analysis and design methodology for the secure web application is applied to online banking system in order to prove its effectiveness.