• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.11
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• pp.937-950
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• 2015

Microstrip reflectarray is an antenna which controls its radiation pattern with a number of reflective elements. Conventionally, the reflectarray has been researched to replace curved reflector antennas. In this paper, design theories of reflectarray is briefly introduced, and research trends of high gain and broadband reflectarrays are reviewed. To improve the gain of the reflectarrays, it is required that the reflection phase errors on the reflectarray surface be minimized. For this purpose, sufficiently wide reflection phase range and low phase sensitivity should be realized with the designed element. For bandwidth improvement, the reflection phase of the element should be linear with the frequency variation. In this paper, various researches to improve the reflection phase characteristics of the element for high gain and broadband reflectarrays, such as multi-layer and single-layer multi-resonant structures, are reviewed. Also, dual-reflectarray configuration for compact antenna design is reviewed. Finally, various applications of reflectarrays such as contoured beam, near-field focusing, and RCS reduction are reviewed.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.2
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• pp.92-100
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• 2002

The 16-port feed waveguide array with inductive walls analyzed by Galerkin's method of moments are proposed for the DBS reception system mounted on vehicle. First of all, in order to verify the validity of electromagnetic analysis and design for a $\pi$-junction feed waveguide, it is designed and fabricated at DBS band. The measurement results of a $\pi$-junction feed waveguide agree well with the theoretical ones. Based on this design method, an array design for WR-90 standard waveguide is conducted. Since the width of a $\pi$-junction feed WR-90 standard waveguide is larger than a guided wave length in an array design, the difference of amplitude and phase of 8-port array are calculated 2.3 dB and 62 degrees, respectively. The bandwidth with return loss of -20 dB below is about 220 MHz and it doesn't satisfy DBS band. To solve this problem, we propose a novel design that the width of a $\pi$-junction feed waveguide equals to a guided wave length. By the proposed novel design for 8-port feed waveguide array, the difference of amplitude and phase are decreased 1 dB and 13 degrees, respectively. The broad bandwidth of 700 MHz is also realized. The size of 16-port waveguide away compared with WR-90 array is reduced about 10 cm. The measured antenna gain for the fabricated 16-port feed waveguide array is observed 24 dBi above at DBS band.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.4B
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• pp.708-714
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• 2000

In this paper, an one-dimensional VLSI array for high speed processing of fractal image compression algorithm based the quad-tree partitioning method is proposed. First of all, the single assignment code algorithm is derived from the sequential Fisher's algorithm, and then the data dependence graph(DG) is obtained. The two-dimension array is designed by projecting this DG along the optimal direction and the one-dimensional VLSI array is designed by transforming the obtained two-dimensional array. The number of Input/Output pins in the designed one-dimensional array can be reduced and the architecture of process elements(PEs) can he simplified by sharing the input pins of range and domain blocks and internal arithmetic units of PEs. Also, the utilization of PEs can be increased by reusing PEs for operations to the each block-size. For fractal image compression of 512X512gray-scale image, the proposed array can be processed fastly about 67 times more than sequential algorithm. The operations of the proposed one-dimensional VLSI array are verified by the computer simulation.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.3
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• pp.15-21
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• 2017

In the active SONAR system, various studies have been carried out to enhance the resolution of a received signal. In order to obtain higher resolution for detecting a bottoming cylindrical object, the design of a planar array for SONAR is investigated in this paper. It is necessary to employ planar structures for SONAR array to obtain narrower beam pattern which gives high resolution. In this study, the transmit frequency of each acoustic transducer, which consists of an array is 13 kHz. For efficient detection of a target of an asymmetric size, the concept of areal angle is applied, which considers resolution according to both azimuth and elevation angles in array design. In the design, the areal angle is first investigated to satisfy the resolution requirements, and then based on the value of areal angles, the azimuth angle and the elevation angle are calculated respectively to design an array.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.4
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• pp.209-215
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• 2002

This paper describes beam-tilting characteristics of horizontally polarized EMCD (electromagnetically coupled dipole) array antennas. The result of one element radiator is used for array elements designs and is evaluated its characteristics. Theoretical frequency characteristics and radiation pattern of the horizontally polarized EMCD array antennas analyzed by FDTD method agree well with the measured results of the practically fabricated way antennas. The measured main beam tilt ang1e and 3 dB beam width of the fabricated 20-element array antennas are 47$^{\circ}$and about $\pm$7.5$^{\circ}$, respectively. A good radiation pattern and beam tilting characteristics are observed in experiments.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.12
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• pp.17-23
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• 2003

A sensor array (3${\times}$5$\textrm{mm}^2$ in diaphragm dimension) of 12 sensing clements with different operating temperatures was optimized with respect to thermal operation. This sensor array with single heater on a glass diaphragm over back-etched silicon bulk realizes a novel concept of a sensor array: an array of sensor clements operated at different temperatures can yield more information than single measurement. The proposed micro sensor array could provide well-integrated array structure because it had only single heater at the center of the diaphragm and used the various sensing properties of two kinds of metal oxide layers with various operating temperatures.

• The Transactions of the Korea Information Processing Society
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• v.4 no.5
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• pp.1380-1390
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• 1997

This paper presents a systolic array design method which derives 1 or 2 dimensional optimal planar systolic arrays from a given n dimensional problem represented as a regular recurrence equation and its implementation called a systolic array design system(SADS).The SADS parses a regular recurrence equation and gets the information such as problem space, data dependence vectors. and intial data positions. Systolic arrays are automati-cally derived by the space-time transformation form the information to be abeaired in the parsing phase.The SADS allows us to verify the parallel execution of the derived systolic aooay through the graghical interface.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.86-89
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• 2007

실리콘을 사용한 X선 감지 용 센서 어레이 제작에 대해 연구하였다. 단일 센서 소자에서는 필수적인 guard ring구조가 어레이에서는 적절히 설계되지 못할 경우 누설전류 증가를 초래하는 것으로 나타났다. 즉, 누설전류는 공??????층 두께와 능동영역 및 guard ring 구조 간 거리에 매우 민감한 것으로 조사되었다. 또한 다결정 실리콘과 n형 도핑 소스로 인을 활용하는 조합이 결함 gettering을 위한 효율적인 방법임이 입증되었으나 고온 공정과정에 보호되지 않은 채 노출되는 경우에는 효과적이지 못한 것으로 관측되었다. 본 연구에서는 이러한 결과들을 고려하여 어레이를 제작하였으며 우수한 특성을 관찰할 수 있었다.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2002.11a
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• pp.343-349
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• 2002

본 논문에서는 모듈성과 확장성을 갖는 시스톨릭 어레이를 이용한 FIR(finite impulse response) 디지털필터의 구현에 대하여 기술한다. 차분방정식 혹은 전달함수가 주어질 때 기본소자를 이용한 FIR 디지털필터 설계를 위한 2차원 DG(dependence graph)로부터 1차원 시스톨릭 어레이를 유도한 후 유도된 시스톨릭 어레이를 RT 수준에서 VHDL로 모델링하여 동작을 검증하였다 검증된 시스톨릭 어레이를 이용한 FIR 디지털필터는 Hynix에서 제공하는 0.35$\mu\textrm{m}$ 셀 라이브러리와 FPGA칩인 XCV200E을 사용하여 합성 및 구현되었다.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.11a
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• pp.343-349
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• 2002

본 논문에서는 모듈성과 확장성을 갖는 시스톨릭 어레이를 이용한 FIR(finite impulse response) 디지털필터의 구현에 대하여 기술한다. 차분방정식 혹은 전달함수가 주어질 때 기본소자를 이용한 FIR 디지털필터 설계를 위한 2차원 DG(dependence graph)로부터 1차원 시스톨릭 어레이를 유도한 후 유도된 시스톨릭 어레이를 RT 수준에서 VHDL로 모델링하여 동작을 검증하였다. 검증된 시스톨릭 어레이를 이용한 FIR 디지털필터는 Hynix에서 제공하는 0.35$\mu\textrm{m}$ 셀 라이브러리와 FPGA칩인 XCV200E을 사용하여 합성 및 구현되었다.