• Title/Summary/Keyword: 신호 제어 시스템

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A Study on the Optimum Design of Warm-up rate in a Air-Heated Heater System by Using CFD Analysis and Taguchi Method (전산유체해석과 다구찌 방법을 연계한 공기 가열식 히터 시스템의 난방속효성 최적화에 관한 연구)

  • Kim, Min-Ho
    • Transactions of the Korean Society of Automotive Engineers
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    • v.13 no.2
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    • pp.72-82
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    • 2005
  • The objective of this paper is to describe the optimization of design parameters in a large-sized commercial bus heater system by using CFD(computational fluid dynamics) analysis and Taguchi method. In order to obtain the best combination of each control factor which results in a desired performance of heater system, the parameter design of the Taguchi method is adopted for the robust design considering the dynamic characteristic. The research activity may be divided into four phases. The first one is analyzing the problem, i.e., ascertaining the influential factors. In the second phase the levels were set in such a way that their variation would significantly influence the response. In the third phase the experimental runs were designed. In the final phase the planned runs were carried out numerically to evaluate the optimal combination of factors which is able to provide the best response. In this study, eight factors were considered for the analysis: one with two level and seven with three level combinations comprising the $L_{18}(2^1{\times}3^7)$ orthogonal array. The results of this study can be summarized as follows ; (i)The optimum condition of control factor is a set of <$A_2\;B_1\;C_3\;D_3\;E_1\;F_2\;G_3\;H_2$> where A is shape of the outer fin, B is pitch of the outer fin, C is height of the outer fin, D is the inner fin number, E is the inner fin height, F is length of the flame guide, G is diameter of the heating element and H is clearance between air guide and heating element. (ii)The heat capacity of heated discharge air under the optimum condition satisfies the equation y=0.6M w here M is a signal factor. (iii)The warm-up rate improves about three times, more largely as com pared with the current condition, which results in about 9.2minutes reduction.

Optimum Missile Attitude to Minimize Radar Exposure at a High Altitude (고고도에서의 피탐성 최소화 유도탄 최적자세 연구)

  • Moon, Kyujin;Jeong, Ui-Taek;Kim, JeongHun;Ryoo, Chang-Kyung
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.47 no.12
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    • pp.865-873
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    • 2019
  • To improve the survivability of a missile, it needs to be lowered that the detection possibility by radars on the ground. The radar exposure of the target is given as a function of relative distance from the radar to the target and RCS (Radar Cross Section). The RCS of the missile is determined by the incidence angle of the target to electromagnetic radiation emitted from the radar. Under the assumption that the missile equips appropriate attitude control system, the attitude of the missile to minimize radar exposure at a high altitude is investigated in this paper. Two different types of performance cost are considered: the total sum of RCS and the total sum of SNR during the flight. Optimal solutions against multiple ground radars are found by using a SQP (Sequential Quadratic Programming)-based optimization technique.

Performance Evaluation of Reverse Link for Speech and Data Traffic ini CDMA-Based IMT-2000 System (CDMA 방식의 IMT-2000 시스템에서 음성 및 데이터 트래픽에 대한 역방향링크의 성능 평가)

  • Lee, Hyun;Kang, Bob-Joo;You, Young-Gap;Cho, Kyoung-Rok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.4
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    • pp.657-665
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    • 2000
  • In this study, the bit error rate(BER) performance for the speech and data traffic is evaluated by results of the reverse link simulation of CDMA-based IMT-2000. Simulations in the reverse link are achieved for indoor, pedestrian, and vehicular environments, which are provided by ITU-R . Also, in the these simulations, the fast power control of 1.6kHz rate is applied. The amplitude and phase of the fading signal are estimated by using the 5-tap FIR filter, and the soft-decision Viterbi and Reed-Solomon (RS) decoding are applied. Simulation results provide the optimum ratio of pilot power to traffic power, the BER performance according to the number of fingers, and performance comparison between convolutional code and concatenated code at $10^-6$ BER in 5 MHz system.

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EMG Signal Elimination Using Enhanced SVD Filter in Multi-Lead ECG (향상된 SVD 필터를 이용한 Multi-lead ECG에서의 EMG 신호 제거)

  • Park, Kwang-Li;Park, Se-Jin;Choi, Ho-Sun;Jeong, Kee-Sam;Lee, Kyoung-Joung;Yoon, Hyoung-Ro
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.50 no.6
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    • pp.302-308
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    • 2001
  • SVD(Singular Value Decomposition) filter for the suppression of EMG in multi-lead stress ECG is studied. SVD filter consists of two parts. In the first part, the basis vectors were chosen from the averaged singular vectors obtained from the decomposed noise-free ECG. The singular vector is computed from the stress ECG and is compared itself with basis vectors to know whether the noise exist in stress ECG. In the second part, the existing elimination method is used, when one(or two) channels is(or are) contaminated by noise. But the proposed enhanced SVD filter is used in case of having the noise in the many channels. During signal decomposition and reconstruction, the noise-free channel or the least noisy channel have the weight of 1, the next less noisy channel has the weight of 0.8. In this way, every channel was weighted by decreased of 0.2 in proportion to the amount of the added noise. For the evaluation of the proposed enhanced SVD filter, we compared the SNR computed by the enhanced SVD filter with the standard average filter for the noise-free signal added with artificial noise and the patient data. The proposed SVD filter showed better in the SNR than the standard average filter. In conclusion, we could find that the enhanced SVD filter is more proper in processing multi-lead stress ECG.

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The Study on influence of test factors for WorldSID injury through AE-MDB side crash test (AE-MDB시험 시 인체모형 상해치에 대한 시험 인자 영향성 연구)

  • Sun, Hongyul;Han, Pyokyong;Oh, Eunkyung;Yoon, Ilsung
    • Journal of Auto-vehicle Safety Association
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    • v.7 no.1
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    • pp.7-12
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    • 2015
  • NCAP(New Car Assessment Program) makes vehicle manufacturer improve safety performance through free competition and customers guarantee vehicle selection by providing information of vehicle safety. That's why it is important not only to meet the regulation, but also to cope with NCAP. EuroNCAP(European New Car Assessment Program) side tests have conducted by using Progressive MDB and Euro SID II in order to reproduce crash test between two vehicles over 10 years. However various researches report that Progressive MDB and Euro SID II do not reflect evolving vehicle design, impact performance and biofidelity of human. Therefore EuroNCAP has the plan to conduct AE-MDB side crash test using WorldSID which is more evolved from 2015 by replacing Progressive MDB and EuroSID II. Automobile manufacturers need to develop safety performance for new test closely. This paper is to find test set-up parameters which affect into dummy injury instead of restraint system and to research on its tendency. It is processed with mini and small car to know influence as changing vehicle size and also analyzed by DFSS(Design for six sigma) which is one of optimization tools. DFSS is vaildated by simulating CAE with L18 orthogonal array of 6 control factors adjustable as EuroNCAP requirement.

The Design of Terrestrial DMB Media Processor for Multi-Channel Audio Services (멀티채널 오디오 서비스를 위한 지상파 DMB 미디어처리기 설계)

  • Kang Kyeongok;Hong Jaegeun;Seo Jeongil
    • The Journal of the Acoustical Society of Korea
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    • v.24 no.4
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    • pp.186-193
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    • 2005
  • The Terrestrial Digital Multimedia Broadcasting (T-DMB) system supplies high quality audio comparable with VCD in 7 inch display and high quality audio comparable CD at the mobile reception environment T-DMB will launch commercial service at the middle of 2005. However the bandwidth for audio data and the number of channels are restricted to 128 kbps and 2 respectively in the current T-DMB standard because of the limitation of available bandwidth for multimedia data. This Paper Proposes a novel media processor structure for providing multi-channel audio contents oyer T-DMB system allowing backward compatibility with the legacy T-DMB receiver. Furthermore. we also Propose an adaptive receiver structure to supply optimal audio contents on various speaker configuration in T-DMB receiver. To provide multi-channel audio contents allowing backward comaptilbity with the legacy T-DMB receiver, the additional data for multi-channel audio are defined as a dependent stream of main audio stream. The OD strucure for control an additional multi-channel audio elementary stream is proposed without changing the BIFS of the legacy T-DMB system.

Performance Analysis of a Cascaded Interference Canceller using Dead Zone Decision for DS/CDMA System (DS/CDMA 시스템에서 Dead Zone 검출방식을 이용한 직렬 간섭제거의 성능분석)

  • Lee, Sang-Hun;Kim, Nam
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.5
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    • pp.689-696
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    • 2000
  • In this paper, the cascaded co-channel interference canceller using the dead zone decision is proposed to reduced the co-channel interference in the DS/CDMA communication with the multipath fading and its performance is analyzed. The cancellation scheme creates the replica of the co-channel interference using the data decision of correlator output and removes it at the next stage. The canceller uses the dead zone decision which is detecting strong signal to obtain a good performance in the mobile communication. The results of performance analysis show that the proposed cancellation scheme has the improved performance and the number of user is increased 4 times compared with the conventional receiver, and increased 17% compared with the hard decision. And also the perfect power control is required along with increasing the number of user.

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Run-Time Hardware Trojans Detection Using On-Chip Bus for System-on-Chip Design (온칩버스를 이용한 런타임 하드웨어 트로이 목마 검출 SoC 설계)

  • Kanda, Guard;Park, Seungyong;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.343-350
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    • 2016
  • A secure and effective on-chip bus for detecting and preventing malicious attacks by infected IPs is presented in this paper. Most system inter-connects (on-chip bus) are vulnerable to hardware Trojan (Malware) attack because all data and control signals are routed. A proposed secure bus with modifications in arbitration, address decoding, and wrapping for bus master and slaves is designed using the Advanced High-Performance and Advance Peripheral Bus (AHB and APB Bus). It is implemented with the concept that arbiter checks share of masters and manage infected masters and slaves in every transaction. The proposed hardware is designed with the Xilinx 14.7 ISE and verified using the HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA device. The design has a total gate count of 39K at an operating frequency of 313MHz using the $0.13{\mu}m$ TSMC process.

The Implementation of High speed Memory module Interface in the Military Single Board Computer (군용Single Board Computer에서의 고속메모리모듈 I/F구현)

  • Lee, Teuc-Soo;Kim, Young-Kil
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.3
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    • pp.521-527
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    • 2011
  • POWER PC series are common to the Central Processing Unit for Military Single Board Computer. Among them, G4 group, which contains the 74xx series supported by Freescale manufacturer is mainly used in the Military applications. We focus on the Interface between memory and controller. PCB stacking method, component routing, impedance matching and harsh environment for Military spec are the main constraints for implementation. Also, we developed memory as a module for the consideration of Military environments. The overall type of SBC should be designed by the form of 6U VME or 3U VME. Therefore this study suggests the electrically optimum Interface matching, Artwork technology based on the signal cross over and PCB stacking method on the harsh environment.

SoC Design for Malicious Circuit Attack Detection Using on-Chip Bus (온칩버스를 이용한 악성 회로 공격 탐지 SoC 설계)

  • Guard, Kanda;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.885-888
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    • 2015
  • A secure and effective on-chip bus for detecting and preventing malicious attacks by infected IPs is presented in this paper. Most system inter-connect (on-chip bus) are vulnerable to hardware Trojan (Malware) attack because all data and control signals are routed. A proposed secure bus with modifications in arbitration, address decoding, and wrapping for bus master and slaves is designed using the Advanced High-Performance and Advance Peripheral Bus (AHB and APB Bus). It is implemented with the concept that arbiter checks share of masters and manage infected masters and slaves in every transaction. The proposed hardware is designed with the Xilinx 14.7 ISE and verified using the HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA device. The design has a total gate count of 40K at an operating frequency of 250MHz using the $0.13{\mu}m$ TSMC process.

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