• Title/Summary/Keyword: 시뮬레이션 시스템 개발

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A Study of Delay Test for Sequential circuit based on Boundary Scan Architecure (순서회로를 위한 경계면 스캔 구조에서의 지연시험 연구)

  • Lee, Chang-Hee;Kim, Jeong-Hwan;Yun, Tae-Jin;Nam, In-Gil;Ahn, Gwang-Seon
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.3
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    • pp.862-872
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    • 1998
  • In this paper, we developed a delay test architecture and test procedure for clocked sequential circuit. In addition, we analyze the problems of conventional and previous method on delay test for clocked sequential circuit in IEEE 1149.1. This paper discusses several problems of Delay test on IEEE 1149.1 for clocked sequential circuit. Previous method has some problems of improper capture timing, of same pattern insertion, of increase of test time. We suggest a method called ARCH-S, is based on a clock counting technique to generate continuous clocks for clocked input of CUT. A 4-bit counter is selected for the circuit under test. The simulation results ascertain the aecurate operation and effectiveness of the proposed architecture.

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Real Time AOA Estimation Using Analog Neural Network Model (아날로그 신경망 모델을 이용한 실시간 도래방향 추정 알고리즘의 개발)

  • Jeong, Jung-Sik
    • Journal of Navigation and Port Research
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    • v.27 no.4
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    • pp.465-469
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    • 2003
  • It has well known that MUSIC and ESPRIT algorithms estimate angle of arrival(AOA) with high resolution by eigenvalue decomposition of the covariance matrix which were obtained from the array antennas, However, the disadvantage of MUSIC and ESPRIT is that they are computationally ineffective, and then they are difficult to implement in real time. the other problem of MUSIC and ESPRIT is to require calibrated antennas with uniform features, and are sensitive ti the manufacturing fault and other physical uncertainties. To overcome these disadvantages, several method using neural model have been study. For multiple signals, those methods require huge training data prior to AOA estimation. This paper proposes the algorithm for AOA estimation by interconnected Hopfield neural model. Computer simulations show the validity of the proposed algorithm. It follows that the proposed method yields better AOA estimates than MUSIC. Moreover, out method does not require huge training procedure and only assigns interconnected coefficients to the neural network prior to AOA estimation.

Characteristics Analysis of CVT with Built-in Crank for Bicycle (자전거용 크랭크 일체형 자동변속기에 대한 특성 해석)

  • Baek, Seung-Yub
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.2
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    • pp.963-969
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    • 2015
  • Bicycle is one of the most popular mode of transport due to the increase of interest in the well-being and environment pollution. Before fabricating a continuously variable transmission that is applied to the actual bicycle, for reducing the problems in the early stage, the reliable simulation program has been applied and the financial problem can be solved. In this paper, in order to confirm the design factor, the stress analysis has been applied. In all models, each link and the joint portion are assumed to be a major design factors, and impact of each link and joints received stress during the operation and it is confirmed by using the CAE. Also, for the analysis region, the special code has been developed to calculate pulsation phenomenon through appropriate mathematical modeling.

Specification and Synthesis of Speed-independent Circuit using VHDL (VHDL을 이용한 속도 독립 회로의 기술과 합성)

  • Jeong, Seong-Tae
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.7
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    • pp.1919-1928
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    • 1999
  • There are no standard language for the specification of speed-independent circuits because existing specification methods are designed appropriately to each synthesis methodology. This paper suggests a method of using VHDL, a standard hardware description language, for the specification and synthesis of speed-independent circuits. Because VHDL is a multi-purpose language, we define a subset of VHDL which can be used for the synthesis. We transform the VHDL description into a signal transition graph and then synthesize speed-independent circuits by using a previous synthesis algorithm which uses a signal transition graph as the specification method. We suggest a systematic transformation method which transforms each VHDL statement into a partial signal transition graph and then merges them into a signal transition graph. This work is a step towards to the development of an integrated framework in which we can utilizes the existing CAD tools based on VHDL. Also, this work will enable a easier migration of the current circuit designers into asynchronous circuit design.

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Design and Evaluation of an Early Intelligent Alert Broadcasting Algorithm for VANETs (차량 네트워크를 위한 조기 지능형 경보 방송 알고리즘의 설계 및 평가)

  • Lee, Young-Ha;Kim, Sung-Tae;Kim, Guk-Boh
    • Journal of Internet Computing and Services
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    • v.13 no.4
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    • pp.95-102
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    • 2012
  • The development of applications for vehicular ad hoc networks (VANETs) has very specific and clear goals such as providing intellectual safe transport systems. An emergency warning technic for public safety is one of the applications which requires an intelligent broadcast mechanism to transmit warning messages quickly and efficiently against the time restriction. The broadcast storm problem causing several packet collisions and extra delay has to be considered to design a broadcast protocol for VANETs, when multiple nodes attempt transmission simultaneously at the access control layer. In this paper, we propose an early intelligent alert broadcasting (EI-CAST) algorithm to resolve effectively the broadcast storm problem and meet time-critical requirement. The proposed algorithm uses not only the early alert technic on the basis of time to collision (TTC) but also the intelligent broadcasting technic on the basis of fuzzy logic, and the performance of the proposed algorithm was compared and evaluated through simulation with the existing broadcasting algorithms. It was demonstrated that the proposed algorithm shows a vehicle can receive the alert message before a collision and have no packet collision when the distance of alert region is less than 4 km.

A Basic Study on Plastic Suspension System for Automotive Seat under Consideration of Body Pressure Distribution (체압 분포를 고려한 자동차 시트용 플라스틱 서스펜션에 대한 기초적 연구)

  • Park, Dae-Min;Kim, Key-Sun;Choi, Doo-Seuk;Kim, Sei-Whan;Park, Won-Sik;Cho, Jae-Ung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.11
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    • pp.4751-4755
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    • 2011
  • This study investigates the plastic suspension assembly which is installed on inside of vehicle seat and support passenger's back to supply the comfortable ride performance. It aims to develop the structural design in order to support driver's back uniformly and assemble seat back frame with plastic suspension effectively. The part of suspension is designed by considering the body pressure distribution of driver and it has the same size as the practical model on simulation analysis. It is confirmed that the analysis result of plastic suspension approaches the practical measured values and the better body pressure distribution can be obtained as compared with the existing wire type.

Development of an Automation Library in Multi-Body Dynamics Program for Dynamic Structural Analysis of Block Lifting Process (블록의 리프팅 동적 구조해석을 위한 다물체 동역학 프로그램의 내장형 자동화 라이브러리 개발)

  • Jung, Da-un;Cha, Ju-Hwan;Song, Chang-Yong;Lee, Chung-Hyoung
    • Journal of the Society of Naval Architects of Korea
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    • v.53 no.2
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    • pp.135-143
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    • 2016
  • In this study, an embedded system composed of equipment setting, block importing, scenario setting and output reporting is developed in multi-body dynamics program, ADAMS, for conducting dynamic structural analysis of block lifting process. First, equipment used for block lifting process is set in the simulation environment and the shapes and functions of two lifting beams, and six block loaders are provided as the equipment. Second, the modal analysis result of the lifting block is imported from the static structural analysis system, NASTRAN. Third, the lifting scenarios, such as hoisting, waiting, trolley moving, and wire connecting, are set in the system. Finally, output results in the forms of plots, texts and tables, are reported after the dynamic structural analysis. The test examples conducted in a shipyard are applied into the developed system in various condition and scenarios. The loads at the lug points, the stress contours, and the hot spot tables of the developed system are compared with the result of the static analysis system.

Cleaning Noises from Time Series Data with Memory Effects

  • Cho, Jae-Han;Lee, Lee-Sub
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.4
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    • pp.37-45
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    • 2020
  • The development process of deep learning is an iterative task that requires a lot of manual work. Among the steps in the development process, pre-processing of learning data is a very costly task, and is a step that significantly affects the learning results. In the early days of AI's algorithm research, learning data in the form of public DB provided mainly by data scientists were used. The learning data collected in the real environment is mostly the operational data of the sensors and inevitably contains various noises. Accordingly, various data cleaning frameworks and methods for removing noises have been studied. In this paper, we proposed a method for detecting and removing noises from time-series data, such as sensor data, that can occur in the IoT environment. In this method, the linear regression method is used so that the system repeatedly finds noises and provides data that can replace them to clean the learning data. In order to verify the effectiveness of the proposed method, a simulation method was proposed, and a method of determining factors for obtaining optimal cleaning results was proposed.

Control of 30kW Grid-Connected PCS for Wave Power Generation (파력발전용 30kW 계통연계형 PCS 제어)

  • Kim, Wan-Seok;Kim, Jae-Hyuck
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.3
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    • pp.470-475
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    • 2019
  • This paper deals with a 30kW grid-connected PCS (Power Conversion System) for an Oscillating Water Column (OWC) wave-power generation system. Wave power generation in marine energy is suitable for Korea with the characteristics of a peninsula with three sides facing the sea. In the case of coastal disasters, wave generators can act as a breakwater to reduce damage, and can be integrated with other marine power generation systems to increase efficiency. Wave power generation systems are classified into various types, such as oscillating bodies, OWC, and overtopping according to the operation principle, and they can also be classified into two types according to the installation method: a fixed structure and floating structure. This paper proposes a 30kW grid-connected PCS topology and model for OWC wave power generation that is structurally stable with a turbine and generator that are relatively easy to maintain, and then provide a control method required for grid connection, including DC link voltage control. Simulation verification was performed to verify the proposed PCS.

Design of a Simple PCM Encoder Architecture Based on Programmable ROM (프로그래머블 ROM 기반의 심플 PCM 엔코더 설계)

  • Kim, Geon-Hee;Jin, Mi-Hyun;Kim, Bok-Ki
    • Journal of Advanced Navigation Technology
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    • v.23 no.2
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    • pp.186-193
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    • 2019
  • This paper presents and implements a simple programmable PCM encoder structure uisng the commutation method. In the telemetry system, information is required to assign each data to the channel in order to generate a frame format the data acpuired from the sensor. In this case, when the number of state information is large or the data type is various, there is a necessity to input a large amount of information to each channel. However, the more the number of channels and data, the more probability the error will occur. Therefore, in this paper, the channel information is created using the program. And PCM encoder was implemented to store channel information in ROM. The proposed PCM encoder architecture reduces the likelihood of errors. And it can improve the development speed. The validity of proposed structure is proved by simulation.