• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.5
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• pp.96-104
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• 2004

This paper proposes a dc power regenerating systems, which can generate the excessive dc power from dc bus line to ac supply in substations for traction system The proposed regeneration inverter system for dc traction can be used as both an inverter and an active power filter(APF). As an regeneration inverter mode, it can recycle regenerative energy caused by decelerating tractions and as an active power filter mode, it can compensate for harmonic distortion produced by the rectifier substation. From the viewpoint of both power capacity and switching losses, the system is designed on the basis of three phase PWM inverters and composed of parallel inverters, output transformers, and an LCL filter.

• Journal of Advanced Marine Engineering and Technology
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• v.37 no.1
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• pp.121-126
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• 2013

Cycloconverter used as a power conversion device in the speed and torque control system of AC machines has the advantage of a simple control and a large torque at low speed. In addition, because a rectifier, a DC link, and an inverter are not installed, this system is simple and suitable for large power system. If a power conversion device, which is currently used as a propulsion motor of large vessel, is changed into cycloconverter, the system is simplified and then the installation costs can be significantly reduced. However, conventional cycloconverter has the increased harmonics because the power loss is large and the waveform of output voltage is distorted, due to the high-speed switching of power semiconductor devices. In order to improve these shortcomings, this paper describes a phase shifting filter which is composed of two inputs with different phases in the primary side and one output in the secondary one. As the voltage waveforms with two different phases are added and transformed into the secondary side, these outputs are close to sinusoidal waves. Thereby the voltage waveforms, which are applied to the propulsion motors, are improved and total harmonic distortions (THDs) are significantly reduced.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.2
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• pp.313-322
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• 2000

The ATM Forum has been focusing on flow control mechanism for ABR traffic management. The goal of this activity is to efficiently manage the leftover network bandwidth and fairly distribute it among contending ABR VC so that communication links can be optimally utilized. ABR traffic is difficult to predict traffic shape because it has bursts and variable behavior. Also it's sensitive to lose but not to delay. This behavior makes difficult to UPC function in network and cause of congestion in switch, thus performance is degraded. To resolve this problem, various flow control mechanism has been worked in the ATM Forum. Especially, the rate-based flow control mechanism for ABR traffic has been standardized in the ATM Forum, Sept. 1994. Thus, various flow control mechanism has been working which likes EFCI, ER, VS/VD. VS/VD control is superior than existed ER control because it isolate different networks from each other. In this paper, we propose an expanded VS/VD flow control algorithm and compare with existed VS/VD flow control algorithm. Simulation result shows that this algorithm improve a problem in aspect of delay and fairness.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.44-51
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• 2008

A stereo audio digital-to-analog converter (DAC) with a power amplifier using asymmetric pulse-width modulation (PWM) is presented. To adopt class-D amplifier mainly used in high-power audio appliances for head-phones application, this work analyzes the noise caused by the inter-channel interference during the integration and optimizes the design of the sigma-delta modulator to decrease the performance degradation caused by the noise. The asymmetric PWM is implemented to reduce switching noise and power loss generated from the power amplifier. This proposed architecture is fabricated in 0.13-mm CMOS technology. The proposed audio DAC including the power amplifier with single-ended output achieves a dynamic range (DR) of 95-dB dissipating 4.4-mW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.692-701
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• 2003

In this paper, a new logic transformation method to consider both low power consumption and high testability is proposed. We search the CFF(Compact Fanout Free) that has low probability of being observable at the primary outputs. Under the condition that the CFF is unobservable at all primary outputs, the switching operations in it can be removed by adding redundant connections into it. The testability of the transformed circuit generally tends to reduce. In our method, however, the inserted redundant connections operate as test points in the test mode and can improve not only the controllability but also the observability of the CFF. The transformed circuit consumes less power in the normal mode and also has higher testability in the test mode. To show the efficiency of the proposed logic transformation method, we perform some experiments on the MCNC benchmark test circuits. The results show that the power consumption of the transformed circuit is reduced by 13% maximally and the fault coverage of the transformed circuit is increased.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.5
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• pp.43-50
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• 2002

To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage -doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A high input power factor of 97[%] and an efficiency of 98[%] are also obtained. The harmonic guide lines of proposed rectifier is no interfered with inverter switching, resulting in a simple, reliable and low-cost ac-to dc converters in comparison with the boost-type current-improving circuits.It compared conventional pulse-widthmodulated(PWM)inverter with half pulse-widthmodulated (HPWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switchingloss and holding over-shooting.

• Journal of IKEEE
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• v.18 no.4
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• pp.586-592
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• 2014

In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.10
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• pp.2263-2268
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• 2015

This paper describes packet scheduling techniques that can be used to alleviate the impact of interference. The mechanism is consisted of interference estimation and master delay police. Proposed scheduling police is effective in reducing packet loss and delay. Another advantage worth mentioning, are the additional saving s in the transmitter power since packet are not transmitted when channel is bad. This paper gives that scheduling policy works only with data traffic since voice packets need to be sent at fixed intervals. However, if the delay variance is constant and the delay can be limited to a slot, it may be worthwhile to use DM packet for voice.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.6
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• pp.439-446
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• 2008

The medium power system for the recent electronic products that can perform the multi-function requires various multi-output, high-efficiency and low cost characteristics. To cope with these critical issues, a new high-efficiency and cost-effective multi-output LLC resonant converter is proposed in this paper. The proposed converter requires only 1 power switch instead of the bulky and expensive non-isolated DC/DC converter. Therefore, it features a simple structure, lower cost and high-efficiency. Especially, since the proposed converter can ensure the ZVS or ZCS of all power switches, it has very desirable advantages such as more improved EMI characteristics and reduced switching losses. Finally, to confirm the operation, validity, and features of the proposed circuit, experimental results from a SMPS prototype for 42" FHD PDP TV are presented.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.1
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• pp.1-7
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• 2016

In this paper, the tunable filter based on high power cavity using mechanical switch for 1.5 GHz band is presented. The LPF is inserted to eliminate the spurious wave, coupler is embeded to extract the output power, and then the tunable filter system is configured using mechanical switch. The LPF obtains attenuation over 40 dB between 4 GHz and 12.75 GHz, Coupler is satisfied with coupling value 40 dB and coupling isolation over 55 dB. The tunable filter system using mechanical switch obtains insertion loss 0.88 dB at bypass mode between 1,495.9 MHz and 1,510. 9 MHz, 3.29 dB at fil mode between 1,495.9 MHz and 1,500.9 MHz. It is also satisfied with output power of 132 W at the center frequency 1,498.4 MHz, and switching time below 10 ms.