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A New Logic Transformation Method for Both Low Power and High Testability  

손윤식 (한양대학교 전자공학과)
정정화 (한양대학교 전자공학과)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.40, no.9, 2003 , pp. 692-701 More about this Journal
Abstract
In this paper, a new logic transformation method to consider both low power consumption and high testability is proposed. We search the CFF(Compact Fanout Free) that has low probability of being observable at the primary outputs. Under the condition that the CFF is unobservable at all primary outputs, the switching operations in it can be removed by adding redundant connections into it. The testability of the transformed circuit generally tends to reduce. In our method, however, the inserted redundant connections operate as test points in the test mode and can improve not only the controllability but also the observability of the CFF. The transformed circuit consumes less power in the normal mode and also has higher testability in the test mode. To show the efficiency of the proposed logic transformation method, we perform some experiments on the MCNC benchmark test circuits. The results show that the power consumption of the transformed circuit is reduced by 13% maximally and the fault coverage of the transformed circuit is increased.
Keywords
Logic transformation; redundant interconnection; fanout free; controllability; observability;
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