• Title/Summary/Keyword: 스위칭기법

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Protecting E-mail Server with Class-Based Rate Limiting Technique (클래스 기반의 대역 제한 기법을 통한 이메일 서버의 보호)

  • Yim, Kang-Bin;Lee, Chang-Hee;Kim, Jong-Su;Choi, Kyung-Hee;Jung, Gi-Hyun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.6 s.324
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    • pp.17-24
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    • 2004
  • This paper proposes an efficient technique to protect e-mail server from DDoS attack using the CBQ (Class Based Queuing) algorithm The proposed method classifies incoming trafic to an e-mail server into three classes: 'more important mail traffic', 'less important traffic' and 'unknown traffic' and assigns bandwidths differently to the traffics. By differentiating the bandwidths of classes, normal mail traffic may flow even under DDoS attack in the proposed technique. The proposed technique is implemented on an embedded system which hires a switching processor with the WFHBD(Weighted Fair Hashed Bandwidth Distribution) engine that has been known as an efficient algorithm to distribute a given bandwidth to multiple sources, and it is verified that it can be an efficient way to protect e-mail server from DDoS attack.

A Study on Design and Implementation of a VC-Merge Capable LSR on MPLS over ATM (ATM기반 MPLS망에서 확장성을 고려한 VC-Merge 가능한 LSR 설계에 관한 연구)

  • Kim, Young-Chul;Lee, Tae-Won;Lee, Dong-Won;Choi, Deok-Jae;Lee, Guee-Sang
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.38 no.12
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    • pp.29-38
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    • 2001
  • Recently, as Internet and its services grow rapidly, IETF(Internet Engineering Task Force) introduced a new switching mechanism, MPLS(Multi-Protocol Label Switching), to solve the problem of the scalability in Internet backbone. In this paper, we implemented the LSR loaded with VC-merging function, which causes LSR's management cost to be significantly reduced. We propose a new VC-merge function which supports differentiated services. In case of network congestion in the output buffer of each core LSR, appling link polices to the output modules of the LSR using the EPD algorithm can prevent the buffer from being overflowed. Simulation was performed for Diffserv by using multiple traffic models and investigated the impact of VC-merge method compared to non VC-merge method. The proposed switch is modeled in VHDL and fabricated using the SAMSUNG $0.5{\mu}m$ SOG process.

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Design of CMOS LC VCO with Linearized Gain for 5.8GHz/5.2GHz/2.4GHz WLAN Applications (5.8GHz/5.2GHz/2.4GHz 무선 랜 응용을 위한 선형 이득 CMOS LC VCO의 설계)

  • Ahn Tae-Won;Moon Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.6 s.336
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    • pp.59-66
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    • 2005
  • CMOS LC VCO for tri-bind wireless LAN applications was designed in 1.8V 0.18$\mu$m CMOS process. PMOS transistors were chosen for VCO core to reduce flicker noise. The possible operation was verified for 5.8GHz band (5.725$\~$5.825GHz), 5.2GHz band (5.150$\~$5.325GHz), and 2.4GHz band (2.412$\~$2.484GHz) using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing technique was used for capacitance linearization and PLL stability improvement. VCO core consumed 2mA current and $570{\mu}m{\times}600{\mu}m$ die area. The phase noise was lower than -110dBc/Hz at 1MHz offset for tri-band frequencies.

Improving the Light-Load Efficiency of a LDO-Embedded DC-DC Buck Converter Using a Size Control Method of the Power-Transistor (파워 트랜지스터 사이즈 조절 기법을 이용한 LDO 내장형 DC-DC 벅 컨버터의 저부하 효율 개선)

  • Kim, Hyojoong;Wee, Jaekyung;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.3
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    • pp.59-66
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    • 2015
  • In this paper, we propose a method of improving the light-load efficiency of DC-DC buck converter using 4bit SAR-ADC (Successive Approximation ADC) for a LDO or a power transistor size selection technique. The proposed circuit selects power transistor sizes depending on load current so that improves the light-load efficiency of the DC-DC buck converter. For this, we select the power transistor size with a cross point of the switching loss and the conduction loss. Also, when the IC operates in standby mode or sleep mode, a LDO mode is selected for improving the efficiency. The proposed circuit selects power transistor sizes(X1, X2, X4, X8) with 4 bits and its efficiency is higher about the maximum of 25% at the light-load than that of a single transistor size. Input voltage and output voltage are 5V and 3.3V for maximum load currents of 500mA.

Frequency Detection Algorithm related Variable Data Sampling and Noise (가변 데이터 샘플링과 잡음을 고려한 주파수 추적 알고리즘)

  • Lim, Young-Bin;Ham, Sung-Sik;Shin, Chul-Ho;Kim, Young- Geun
    • Proceedings of the KIEE Conference
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    • 2015.07a
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    • pp.223-224
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    • 2015
  • 배전 계통 산업 현장에서는 스위칭 소자 및 제어장치, 전 자기기들이 한 대 맞물려 증가하고 있다. 또한, 스마트 그리드(Smart Grid) 및 마이크로 그리드(Micro Grid)의 개념이 도입되면서 분산 전원 이 널리 보급되고 있다. 이로 인해 현장에서는 많은 전기전자기기들이 설치되어 운영 중에 있고, 이것은 noise 및 고조파와 같은 왜란이 발생 되는 원인을 초래하고 있다. 왜란은 여러 전기 전자 장비들의 데이터 취득 왜곡 현상을 발생시키고, 이러한 데이터 손실로 인해 기기들의 오동작 및 사고를 발생시킨다. 대표적인 왜란으로는 common mode noise 같은 대지(大地) 등의 기준점과 각 신호선 사이에 나타나는 노이즈가 있으며, 선로 및 장비 특성에 따라 기수 및 우수 고조파가 있다. 이러한 왜란들은 전자기기들의 오동작 및 신호의 부 정확성으로 제품 신뢰성에 문제를 초래한다. 특히 데이터 계측 실패 및 Serial 통신을 함에 있어서 신호 손실을 발생시켜 데이터 변형을 초래한다. 이로 인해 배전선로에 위치한 전자기기들이 왜곡된 데이터로 동작을 하게 되고 이는 곧 선로의 사고를 발생시키게 된다. 따라서 왜란들을 사전에 방지하여 기기 오동작 및 부동작을 예방하기 위해서 산업계에서는 왜란에 대한 인식을 지속적으로 증가시키고 있다. 실제 현장에서도 이와 같은 왜란으로 인해 기기 오동작을 하는 경우가 많으며 이를 해결하기 위한 여러 신호처리 기법을 적용하고 있다. 이에 본 논문에서는 여러 종류의 샘플링 데이터 량을 생성할 수 있도록 샘플링 속도를 다변환(Multi-interchange)하고 각 샘플링 속도에 맞게 계측된 샘플링 데이터를 DFT 신호 처리하여 왜란으로부터 강건한 계통 주파수를 계측한다. 또한, 주파수 별 DFT 값을 Table화 하여 계통 주파수를 찾아낸다.

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Fault Diagnosis of Voltage-Fed Inverters Using Pattern Recognition Techniques for Induction Motor Drive (패턴인식 기법을 이용한 유도전동기 구동용 전압형 인버터의 고장진단)

  • Park, Jang-Hwan;Park, Sung-Moo;Lee, Dae-Jong;Kim, Dong-Hwa;Chun, Myung-Geun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.3
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    • pp.75-84
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    • 2005
  • Since an unexpected fault of induction motor drive systems can cause serious troubles in many industrial applications, which the technique is required to diagnose faults of a voltage-fed PWM inverter for induction motor drives. The considered fault types are rectifier diodes, switching devices and input terminals with open-circuit faults, and the signal for diagnosis is derived from motor currents. The magnitude of dq-current trajectory is used for the feature extraction of a fault and PCA LDA are applied to diagnose. Also, we show results with respect to the execution time because of the possibility to use that a diagnosis software is embedded in the controllers of medium and small size induction motors drive for real-time diagnosis. After we performed various simulations for the fault diagnosis of the inverter, the usefulness of proposed algerian was verified.

Development of Regenerative Inverter for Electric Railway Using Space Vector PWM (SVPWM을 이용한 전기철도용 회생 인버터 개발)

  • 백병산;정문구;김태완
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.2
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    • pp.97-104
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    • 2004
  • As a device that returns surplus energy, regenerated from trains to d.c. source, to a.c. system and reuses it, the thyristor Inverter has been widely used. Because the conventional thyristor inverter is a unidirectional phase-controlled device, it Is Impossible to control the power factor of its output. Moreover, harmonics emission is high and it needs to take a additional filter. In this paper, to solve the problems stated above, the inverter, which can control real and reactive power by adopting IGBT modules as switching elements and being controlled by means of space vector PWM, is developed. Considering high economical efficiency and reliability in order to apply to the system for commercial use, the developed inverter is equipped with fully digital control system and low pass filter, and reduces harmonics and has compact size. The detail description about the developed inverter is stated in various respects: design criteria, technical description, power circuits, control techniques, the developed system, test results, etc.

A Characteristic Analysis of Single-Power-Stage High Frequency Resonant AC-DC Converter with High Power Factor (고역률 단일 전력단 고주파 공진 AC-DC 컨버터의 특성해석)

  • 남승식;원재선;황계호;오경섭;박재욱;김동희;오승훈
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.4
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    • pp.372-380
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    • 2004
  • This paper proposes a single-power-stage high frequency resonant AC-DC converter with high power factor using ZVS(Zero Voltage Switching), and integrates a conventional converter with two stage into single stage converter. Input power factor is possible to be improved as a high power factor because inductor for power factor correction(PFC) is connected in input and converter is operated in discontinued current mode(DCM) with constant duty cycle and variable switching frequency. The conventional converter with two stage need to add a switch in order to control a power factor, but single stage converter have a advantage that system is simple and cost is down, confidence is improved, etc. This paper described a operation principle and characteristic analysis for single stage AC-DC converter with high power factor and have evaluated characteristic values by using normalized parameter. We make a experimental equipment using MOSFET as a switching device on the basis of characteristic values obtained from characteristic evaluations and we conform a rightfulness of theoretical analysis by comparing theoretical waveforms and experimental waveforms.

Design and Implementation of 3.3 kW On-Board Battery Charger for Electric Vehicles (전기자동차용 3.3 kW 탑재형 배터리 충전기 설계 및 제작)

  • Kim, Jong-Soo;Choe, Gyu-Yeong;Jung, Hye-Man;Lee, Byoung-Kuk;Cho, Young-Jin
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.5
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    • pp.369-375
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    • 2010
  • This paper presents a design and implementation of 3.3 kW on-board battery charger for electric vehicles or plug-in hybrid electric vehicles. Considering characteristics of the electric vehicles, a series-loaded resonant dc-dc converter and frequency control scheme are adopted to improve efficiency and reliability, and to reduce volume and cost. The developed on-board battery charger is designed and implemented by using high frequency of 80-130 kHz and zero voltage switching method. The experimental result indicates 92.5% of the maximum efficiency, 5.84 liters in volume, and 5.8kg in weight through optimal hardware design.

Method for Automatic Switching Screen of OST-HMD using Gaze Depth Estimation (시선 깊이 추정 기법을 이용한 OST-HMD 자동 스위칭 방법)

  • Lee, Youngho;Shin, Choonsung
    • Smart Media Journal
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    • v.7 no.1
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    • pp.31-36
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    • 2018
  • In this paper, we propose automatic screen on / off method of OST-HMD screen using gaze depth estimation technique. The proposed method uses MLP (Multi-layer Perceptron) to learn the user's gaze information and the corresponding distance of the object, and inputs the gaze information to estimate the distance. In the learning phase, eye-related features obtained using a wearable eye-tracker. These features are then entered into the Multi-layer Perceptron (MLP) for learning and model generation. In the inference step, eye - related features obtained from the eye tracker in real time input to the MLP to obtain the estimated depth value. Finally, we use the results of this calculation to determine whether to turn the display of the HMD on or off. A prototype was implemented and experiments were conducted to evaluate the feasibility of the proposed method.