• Proceedings of the KIPE Conference
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• 2019.07a
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• pp.475-476
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• 2019

본 논문에서는 다기능 ESS의 제어알고리즘 및 운영 전략에 따른 모드 천이 안정성 및 경제성 등 장시간 시뮬레이션을 수행할 수 있는 소프트웨어 테스트베드 모델설계 결과를 제시한다. 전력변환장치의 순시 응답 특성을 확인하기 위해서 인버터 전력반도체 스위치, 인덕터 및 커패시터 등의 부품에 대한 모델링이 필요하고, 이는 전력계통에서 활용되고 있는 상용 소프트웨어인 Matlab/Simulink/SimPowerSystems의 라이 브러리를 활용하여 구현할 수 있다. 하지만 평균모델을 사용하는 경우에도 각 요소 회로의 시정수로 인해 시뮬레이션의 샘플링 시간을 줄이는 데는 한계가 있다. 따라서 본 논문에서는 신재생 에너지의 하루 발전 특성에 대한 제어로직에 따른 결과 및 경제성 분석등에 활용할 수 있는 기능모델(functional model)의 설계 방법을 제시하고, 개발된 모델을 상용소프트웨어의 결과와 비교함으로써 본 연구결과의 타당성을 보인다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.9
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• pp.1633-1640
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• 2016

In this paper, we propose a open-ended rectangular microstirp patch antenna with fork-shaped feeding structure. This antenna extends the effective bandwidth by transforming single or multi resonant frequency and is designed planar monopole structure with microstrip line to satisfy the WLAN bands (2.4 - 2.484, 5.15 - 5.35, 5.25-5.825 GHz). The substrate is printed in 0.8 mm thickness on an FR-4 board. A commercial 3D simulation tool was used to analyze surface current and electromagnetic field distribution in order to analyze the operation mode and reconfiguration principle of antenna. According to the lengths of individual patches, simulated reflection loss was compared to obtain optimized values. When it was designed with the optimized values, it satisfied WLAN bands (2.380 - 2.710, 4.900 - 5.950 GHz), if the switch is off, and 2.4 WLAN band (2.380 - 2.710 GHz). From the fabricated and measured results, measured results of return loss, gain and radiation patterns characteristics displayed for operating bands.

• Journal of Satellite, Information and Communications
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• v.6 no.1
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• pp.28-31
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• 2011

In this paper, a new set of structural and sacrificial material that is diamond like carbon (DLC)/photoresist for high performance piezoelectric RF-MEMS switches which are actuated in d33 mode is suggested. To avoid curing problem of photoresist sacrificial layer, DLC structure layer is deposited at room temperature by radio frequency plasma enhanced chemical vapor deposition (RF-PECVD) method. And lead zirconate titanate (PZT) piezoelectric layer is deposited on structure layer directly at room temperature by rf magnetron sputtering system and crystallized by rapid thermal annealing (RTA) equipment. Particular attention is paid to the annealing of PZT film in order to crystallize into perovskite and the variation of mechanical properties of DLC layer as a function of annealing temperature. The DLC layer shows good performance for structure layer in aspect to Young's modulus and hardness. The fabrication becomes much simpler and cheaper with use of a photoresist.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.14 no.3
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• pp.6-14
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• 2000

The high efficiency multi-resonant converter(MRC) is capable of operating at a high frequency because the losses are decreased due to the resonant tank circuit. Such a few MHz high frequency applications provide high power density[W/inch3] of the converter. However, the resonant voltage stress across the switch of the resonant tank circuit is 4∼5 times input voltage. This high voltage stress increases the conduction losses because of on-resistance of a MOSFET with higher rating. In this paper, the modeling analysis for the AT Forward MRC suggested to solve the these problems is discusses. The operational modes of the AT Forward MRC are divided to 8 equivalent modes according to the two switching sequences. Each mode analysis is covered using the equivalent circuits modeled over all of the paper. The operational principle of the resonant converter was verified through the experimental converter with 48[V] input voltage, 5[V]/50[W] output voltage/power and PSpice simulation. The measured maximum voltage, 5[V]/50[W] output voltage/power and PSpice simulation. The measure maximum voltage stress is 170[V] of 2.9 times the input voltage and the maximum efficiency is measured to 81.66%.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.6
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• pp.465-471
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• 2007

The system efficiency of the proposed Buck-Boost AC-DC converter is increased by soft switching method. The converter includes to merit of power factor correction (PFC) from sinusoidal control of input current. The switching behavior of control switches operates with soft switching by partial resonance, and then the proposed converter has high system efficiency with decrement of switching power loss. The input current waveform in proposed converter is got to be a sinusoidal form of discontinuous quasi-pulse row in proportion to magnitude of AC input voltage under the constant duty cycle switching. Therefore, the input power factor is nearly unity. The output voltage of the converter is regulated by PWM control technique. The discontinuous mode action of current flowing into inductor makes to simplify control method and control components. The proposed PFC Buck-Boost converter is analyzed to compare with the conventional PFC Buck-Boost converter. Some computer simulative results and experimental results confirm to the validity of the analytical results.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.1
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• pp.39-44
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• 2003

As the portable electronic equipments are developed and popularized, the batteies are more important. To prolong life of the equipments, engineers demand to have batteries of high-power density and they are used to use Li-ion batteries popularly Li-ion batteries are better than conventional batteries, Ni-cd, about power density per volume and weight, but they have a fault that discharge voltage of them goes down. In order to maximize life of the Li-ion batterries, we have to use a converter which is suitable for the characteristic of Li-ion batteries. Therefore, capacitive idling SEPIC(Single Ended Primary Inductance Converter) that is derived from the SEPIC topology is proposed as a source of the Portable low-power applications. The converter has characteristics of buck-boost porformance. Besides, that makes it possible to increase the switching frequency by partial soft commutation of power switches through adding a diode and a switch. This paper is presented the characteristics, DC voltage conversion ratio, circuits of operation modes, of the converter and it is analized and implemented.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.37 no.5
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• pp.11-116
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• 2000

A topology decreased switching loss and voltage stress by zero voltage switching is presented in this paper. Generally, Switching mode converting productes voltage stress and power losses due to excessive voltage and current. which affect to performance of power supply and reduce overall efficiency of equipments. Virtually, In flyback converter, transient peak voltage and current at switcher are generated by parasitic elements. To solve these problems, present ZVS flyback converter topology applied a auxiliary circuit. Incorporation of auxiliary circuit into a conventional flyback topology serves to reduce power losses and to minimize switching voltage stress. Snubber capacitor in auxiliary circuit serves ZVS state by control voltage variable time at turn on and off of main switch, then reduces voltage stress and power losses. The proposed converter has lossless switching in variable load condition with wide range. A detailed analysis of the circuit is presented and the operation procedure is illustrated. A (50W 100kHz prototype) ZVS flyback converter using a auxiliary circuit is built which shows an efficiency improvement as compared to a conventional hard switching flyback converter.

• Journal of IKEEE
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• v.18 no.4
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• pp.586-592
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• 2014

In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.

• The Transactions of the Korean Institute of Power Electronics
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• v.3 no.4
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• pp.315-322
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• 1998

Power conversion system must increase switching frequency in order to achieve small size, light weight and low noise. However, the switches of converter are subject to high switching power losses and switching stresses. As a result, the power system has a lower efficiency. In this paper, the authors propose an AC-DC boost converter of high efficiency by partial resonant switching mode. The switching devices in the proposed circuit are operated with soft switching and the control technique of those is simplified for switch to drive in constant duty cycle. The partial resonant circuit makes use of a inductor using step up and a condenser of loss-less snubber. Besides, by regenerating energy, that is charged in a loss less snubber condenser of a snubber adopted to a common circuit, toward an input source part, this circuit can get increased efficiency. as merit. The result is that the switching loss is very low, the efficiency and power factor of system is high. The proposed converter is deemed the most suitable for high power applications where the power switching devices are used.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.66-71
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• 2014

This paper presents an analog front-end integrated circuit (IC) for medical ultrasound imaging systems using standard $0.18-{\mu}m$ CMOS process. The proposed front-end circuit includes the transmit part which consists of 15-V high-voltage pulser operating at 2.6 MHz, and the receive part which consists of switch and a low-power low-noise preamplifier. Depending on the operation mode, the output driver in the transmit pulser can be reconfigured as the switch in the receive path and thus the area of the overall front-end IC is reduced by over 70% in comparison to previous work. The designed single-channel front-end prototype consumes less than $0.045mm^2$ of core area and can be utilized as a key building block in highly-integrated multi-array ultrasound medical imaging systems.