• Title/Summary/Keyword: 수신전압

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A Design of Transceiver for 13.56MHz RFID Reader using the Peak Detector with Automatic Reference Voltage Generator (자동 기준전압 생성 피크 검출기를 이용한 13.56 MHz RFID 리더기용 송수신기 설계)

  • Kim, Ju-Seong;Min, Kyung-Jik;Nam, Chul;Hurh, Djyoung;Lee, Kang-Yun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.3
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    • pp.28-34
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    • 2010
  • In this paper, the transceiver for RFID reader using 13.56MHz as a carrier frequency and meeting International Standard ISO 14443 type A, 14443 type B and 15693 is presented. The receiver is composed of envelope detector, VGA(Variable Gain Amplifier), filter, comparator to recovery the received signal. The proposed automatic reference voltage generator, positive peak detector, negative peak detector, and data slicer circuit can adjust the decision level of reference voltage over the received signal amplitudes. The transmitter is designed to drive high voltage and current to meet the 15693 specification. By using inductor loading circuit which can swing more than power supply and drive large current even under low impedance condition, it can control modulation rate from 30 percent to 5 percent, 100 perccnt and drive the output currents from 5 mA to 240 mA depending on standards. The 13.56 MHZ RFID reader is implemented in $0.18\;{\mu}m$ CM08 technology at 3.3V single supply. The chip area excluding pads is $1.5mm\;{\times}\;1.5mm$.

Design of A Current-mode Bandpass Filter in Receiver for High speed PLC Modem (고속 전력선통신 모뎀용 수신단측 전류모드 대역통과 필터 설계)

  • Bang, Jun-Ho;Lee, Woo-Choun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.10
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    • pp.4745-4750
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    • 2012
  • In this paper a $6^{th}$ 1MHz~30MHz bandpass filter for Power line communication(PLC) modem receiver is designed using current mode synthesis method which is good to design the low-voltage and low-power filter. The designed bandpass filter is composed of cascade connecting between $3^{rd}$ Butterworth highpass filter and $3^{rd}$ Chebychev lowpass filter. As a core circuit in the current-mode filter, a current-mode integrator is designed with new architecture which can improve gain and unity gain frequency of the integrator. The gain and the unity gain frequency of the designed integrator is each 32.2dB and 247MHz. And the cutoff frequency of the designed $6^{th}$ bandpass filter can be controlled to 50MHz from 200KHz according to controlling voltage and the power consumption is 2.85mW with supply voltage, 1.8V. The designed bandpass filter was verified using a $0.18{\mu}m$ CMOS parameter.

A Study on Performance Improvement of Detecting Current of the Norton Amplifier (노튼 증폭기의 전류검출성능 개선에 관한 연구)

  • Kwon, Sung-Yeol;Lee, Hyun-Chang;Lee, Kyu-Tae
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.3
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    • pp.185-191
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    • 2018
  • In this paper, an improved Norton amplifier is proposed and the problems caused by the current input in the Norton amplifier, which has advantages in current transmission, are analyzed. The output of the voltage follower consisting of an operational-amplifier with constant output voltage characteristics is used as an input terminal of the proposed circuit. It is configured to detect the power supply current passing through the voltage follower and extract the current from the input terminal. The performance of the improved Norton amplifier is verified at experiment according to the input current. The results are compared with conventional Norton amplifier. Consequently, the input offset voltage, which is a problem in the conventional Norton amplifier, was removed in the proposed circuit. In addition, the average error of the output voltage with respect to the input current was reduced to 4.755%. It is verified that the characteristics of the proposed circuit are improved.

Design of a 6bit 250MS/s CMOS A/D Converter using Input Voltage Range Detector (입력전압범위 감지회로를 이용한 6비트 250MS/s CMOS A/D 변환기 설계)

  • Kim, Won;Seon, Jong-Kug;Jung, Hak-Jin;Piao, Li-Min;Yoon, Kwang-Sub
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.5
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    • pp.16-23
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    • 2010
  • This paper presents 6bit 250MS/s flash A/D converter which can be applied to wireless communication system. To solve the problem of large power consumption in flash A/D converter, control algorithm by input signal level is used in comparator stage. Also, input voltage range detector circuit is used in reference resistor array to minimize the dynamic power consumption in the comparator. Compared with the conventional A/D converter, the proposed A/D converter shows 4.3% increase of power consumption in analog and a seventh power consumption in digital, which leads to a half of power consumption in total. The A/D converter is implemented in a $0.18{\mu}m$ CMOS 1-poly 6-metal technology. The measured results show 106mW power dissipation with 1.8V supply voltage. It shows 4.1bit ENOB at sampling frequency 250MHz and 30.27MHz input frequency.

Design of Low-Power and High-Speed Receiver for a Mobile Display Digital Interface (모바일 디스플레이 디지털 인터페이스용 저전력 고속 수신기 회로의 설계)

  • Lee, Cheon-Hyo;Kim, Jeong-Hoon;Lee, Jae-Hyung;Jin, Liyan;Yin, Yong-Hu;Jang, Ji-Hye;Kang, Min-Cheol;Li, Long-Zhen;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.7
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    • pp.1379-1385
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    • 2009
  • We propose a low-power and high-speed client receiver for a mobile display digital interface (MDDI) newly in this paper. The low-power receiver is designed such that bias currents, sink and source currents, are insensitive to variations of power supply, process, temperature, and common-mode input voltage (VCM) and is able to operate at a rate of 450Mbps or above under the conditions of a power supply range of 3.0 to 3.6Vand a temperature range of -40 to 85$^{\circ}$C. And it is confirmed by a simulation result that the current dissipation is less than 500${\mu}$A. A test chip is manufactured with the Magna chip 0.35${\mu}$m CMOS process. When a test was done, the data receiver and data recovery circuits are functioning normally.

A Study on Design and Implementation of Low Noise Amplifier for Satellite Digital Audio Broadcasting Receiver (위성 DAB 수신을 위한 저잡음 증폭기의 설계 및 구현에 관한 연구)

  • Jeon, Joong-Sung;You, Jae-Hwan
    • Journal of Navigation and Port Research
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    • v.28 no.3
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    • pp.213-219
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    • 2004
  • In this paper, a LNA(Low Noise Amplifier) has been developed, which is operating at L-band i.e., 1452∼1492 MHz for satellite DAB(Digital Audio Brcadcasting) receiver. The LNA is designed to improve input and output reflection coefficient and VSWR(Voltage Standing Wave Ratio) by balanced amplifier. The LNA consists of low noise amplification stage and gain amplification stage, which make a using of GaAs FET ATF-10136 and VNA-25 respectively, and is fabricated by hybrid method. To supply most suitable voltage and current, active bias circuit is designed Active biasing offers the advantage that variations in $V_P$ and $I_{DSS}$ will not necessitate a change in either the source or drain resistor value for a given bias condition. The active bias network automatically sets $V_{gs}$ for the desired drain voltage and drain current. The LNA is fabricated on FR-4 substrate with RF circuit and bias circuit, and integrated in aluminum housing. As a reults, the characteristics of the LNA implemented more than 32 dB in gain. 0.2 dB in gain flatness. lower than 0.95 dB in noise figure, 1.28 and 1.43 each input and output VSWR, and -13 dBm in $P_{1dB}$.

Two-stage Inductive Power Transfer Charger for Electric Vehicles (전기자동차 충전기용 2-stage 자기유도 무선전력전송 시스템)

  • Kim, Min-Jung;Joo, Dong-Myoung;Lee, Byoung Kuk
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.169-170
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    • 2016
  • 본 논문에서는 전기자동차 무선충전기 송수신 코일의 결합계수가 변동되는 조건에서, 수신 측에 DC-DC 컨버터를 사용하지 않고, 넓은 출력전압 범위를 갖는 전기자동차 배터리팩을 충전하기 위한 자기유도 무선전력전송 (Inductive Power Transfer, IPT) 충전기 시스템과 제어 알고리즘을 제안한다. 전기자동차용 무선 충전기 시스템은 승강압 역률보상 컨버터와 Bridgeless 정류기를 포함하는 자기유도 IPT 컨버터로 구성되며, 시뮬레이션을 통하여 시스템과 제어기의 타당성을 검증한다.

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Design of Power Amplifier for Stepped Plate Transducer (Stepped Plate Transducer를 위한 전력증폭기의 설계)

  • Kim, Seul-Gi;Kim, In-Dong;Nho, Eui-Cheol;Moon, Won-Kyu;Kim, Won-Ho
    • Proceedings of the KIPE Conference
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    • 2011.07a
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    • pp.232-233
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    • 2011
  • 수중에서는 대기와는 달리 매질의 차이로 인하여 통신의 제약이 따르므로 초음파를 이용하여 정보를 송 수신한다. 수중통신을 하기 위해서는 초음파를 발생시키는 트랜스듀서와 신호를 증폭시키는 전력증폭기가 필요하다. 전력증폭기는 선형적인 출력이 보장되어야 하며, 수중에서의 연료문제로 인하여 높은 효율로 동작하여야한다. 하지만 출력의 선형성과 시스템의 효율은 Trade off의 관계이기 때문에 두 가지 모두를 만족시키는 연구가 요구된다. 그러므로 본 논문에서는 Class B push-pull 증폭기를 사용하여 선형 출력 특성을 보장하며, 신호의 크기에 따라 증폭기의 인가전압을 가변하는 ET(Envelope Tracking) 기술을 적용하여 향상된 효율 특성을 갖는 넓은 대역폭의 전력증폭기를 설계하고 실험을 통해 특성을 확인하였다.

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Research of External Noise Influence by Preventive Analysis of Gas Insulated Switchgear and Its Shielding (가스절연개폐장치 예방진단시 외부 노이즈 영향과 차폐에 관한 연구)

  • Do, Yeong-Hoei;Kim, Jin-Hwan;Park, Han-Woo;Bak, Jong-Rae
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.313_314
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    • 2009
  • 현재 가스절연개폐장치 예방진단에 가장 광범위하게 적용되는 것이 UHF 부분방전 진단법이다. 부분방전시 방사되는 전자파 에너지를 Sensor가 수신하여 전압위상도에 신호강도를 표시하고 전자파 도달시간을 이용하여 결함위치를 쉽게 파악할 수 있는 장점이 있는 반면 Noise 간섭에 취약하여 부분방전 진단결과의 신뢰성이 확보되지 못하는 문제점이 있어 본 연구에서는 가스절연개폐장치의 부분방전 진단시 Noise의 영향과 차폐개선을 통한 부분방전 측정의 새로운 해법을 제시하고자 한다.

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Design of 2.5 Gbps CMOS Optical Transceiver (2.5 Gbps CMOS광 트랜시버 설계)

  • Lee Kyung-Jik;Lee Sang-Bong;Choi Jin-Ho;Choi Young-Wan
    • 한국정보통신설비학회:학술대회논문집
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    • 2003.08a
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    • pp.177-179
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    • 2003
  • 본 논문에서는 $0.35{\mu}m$ CMOS 공정을 이용하여 2.5 Gbps로 동작하는 광 송수신기를 설계하였다. 광 송수신기의 구성을 보자면, 전기 신호를 빛 신호로 전환하여 주는 레이저 다이오드(LD) 구동부와 레이저 다이오드에서 나오는 빛 신호를 수신하여 이를 다시 전기 신호로 바꿔주는 포토 다이오드(PD) 구동 부분으로 구성된다. LD 구동부는 LD의 문턱전류 이상을 공급하는 바이어스 부분과 신호레벨의 모듈레이션 전류를 공급하는 부분으로 구성된다. 디자인된 송신기는 바이어스 전류를 10 mA 정도 공급하여주며, 모듈레이션 전류를 15 mA 정도 공급한다. 수신기는 current decision 부분과 output buffer 부분으로 구성되어 PD로부터 나오는 전류를 다시 디지털 레벨의 전압신호로 바꾸어 주며 디자인된 수신기는 넓은 동작 영역을 가진다.

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