• Journal of IKEEE
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• v.26 no.2
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• pp.306-312
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• 2022

We investigated electrical properties and deep level traps in 4H-SiC merged PiN Schottky (MPS) diodes with different barrier heights by different PN ratios and metallization annealing temperatures. The barrier heights of MPS diodes were obtained in IV and CV characteristics. The leakage current increased with the lowering barrier height, resulting in 10 times larger current. Additionally, the deep level traps (Z_1/2 and RD_1/2) were revealed by deep level transient spectroscopy (DLTS) measurement in four MPS diodes. Based on DLTS results, the trap energy levels were found to be shallow level by 22~28% with lower barrier height It could confirm the dependence of the defect level and concentration determined by DLTS on the Schottky barrier height and may lead to incorrect results regarding deep level trap parameters with small barrier heights.

• Journal of IKEEE
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• v.19 no.1
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• pp.94-100
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• 2015

In this paper, 50V power U-MOSFET which replace the body(PN) diode with Schottky is proposed. As already known, Schottky diode has the advantage of reduced reverse recovery loss than PN diode. Thus, the power MOSFET with integrated Schottky integrated can minimize the reverse recovery loss. The proposed Schottky body diode U-MOSFET(SU-MOS) shows reduction of reverse recovery loss with the same transfer, output characteristic and breakdown voltage. As a result, 21.09% reduction in peak reverse current, 7.68% reduction in reverse recovery time and 35% improvement in figure of merit(FOM) are observed when the Schottky width is $0.2{\mu}m$ and the Schottky barrier height is 0.8eV compared to conventional U-MOSFET(CU-MOS). The device characteristics are analyzed through the Synopsys Sentaurus TCAD tool.

• Journal of Korea Multimedia Society
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• v.3 no.5
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• pp.535-541
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• 2000

In this paper, we analyzed the characteristics of schottky junction to develop the voltage swing of ISL, and simulated the characteristics with the programs at this junctions. Simulation programs for analytic characteristics are the SUPREM V, SPICE, Medichi, Matlab. The schottky junction is rectifier contact between platinum silicide and silicon, the characteristics with programs has simulated the same conditions. The analytic parameters were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, th forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

• Proceeding of EDISON Challenge
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• 2014.03a
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• pp.450-453
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• 2014

쇼트키 장벽 모스펫(Schottky barrier MOSFETs : SB-MOSFETs)은 SB높이(${\Phi}_B$)에 매우 민감하다. 그래서 ${\Phi}_B$를 줄이는 공정 방법에 대한 연구가 활발히 진행 중이다. 이러한 ${\Phi}_B$를 측정할 때, SB-MOSFETs에서가 아닌 SB 다이오드에서 측정이 이뤄지고 있다. 본 논문에서는 ${\Phi}_B$를 SB-MOSFETs에서 측정 할 수 있는 방법을 제안하고 전산모사를 통하여 채널의 길이와 두께, Overlap / Underlap 구조, 온도 등에 대한 의존성을 살펴 보았다. 그 결과 채널의 길이와 두께, Overlap / Underlap 구조에 따른 의존성은 없는 것으로 확인되었다. 하지만 20nm 이하의 채널의 소자에 대해서는 소스/드레인간 터널링 전류로 인해 정확한 ${\Phi}_B$ 측정이 불가능하였다. 그리고 저온에서 측정할 때 정확도가 높아짐을 확인하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.1
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• pp.157-165
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• 2001

We analyzed the electrical characteristics of platinum silicide schottky junction to develope the voltage swing in Integrated Schottky Logic gates, and simulated the characteristics with the programs in this junctions. Simulation programs for analytic characteristics are the Medichi tool for device structure, Matlab for modeling and SUPREM V for fabrication process. The silicide junctions consist of PtSi and variable silicon substrate concentrations in ISL gates. Input parameters for simulation characteristics were the same conditions as process steps of the device farications process. The analitic electrical characteristics were the turn-on voltage, saturation current, ideality factor in forward bias, and has shown the results of breakdown voltage between actual characteristics and simulation characteristics in reverse bias. As a result, the forward turn-on voltage, reverse breakdown voltage, barrier height were decreased but saturation current and ideality factor were increased by substrates increased concentration variations.

• Electrical & Electronic Materials
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• v.8 no.1
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• pp.56-63
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• 1995

MESFETs of the Ti/Au and Ti/Pd/Au gate were fabricated on n-type GaAs. Interdiffusion at Schottky interfaces, Schottky contact properties, and MESFET characteristics with heat treatment were investigated. Ti of Ti/Au contact and Pd of Ti/Pd/Au contact acted as a barrier metal against interdiffusion of Au at >$220^{\circ}C$. Pd of Ti/Pd/Au contact acted as a barrier metal even at >$360^{\circ}C$, however, Ti of Ti/Au contact promoted interdiffusion of Au instead of role of barrier metal. As the heat treatment temperature increases, in the case of both contact, saturated drain current and pinch off voltage decreased, open channel resistance increased, and degree of parameter variation in Ti/Au gate was higher than in Ti/Pd/Au gate at >$360^{\circ}C$ Schottky barrier height of Ti/Au and Ti/Pd/Au contacts was 0.69eV and 0.68eV in the as-deposited state, respectively, and Fermi level was pinned in the vicinity of 1/2Eg. As the heat treatment temperature increases, barrier height of Ti/Pd/Au contact increased, however, decreased at >$360^{\circ}C$ in the case of Ti/Au contact. Ideality factor of Ti/Au contact was nearly constant regardless of heat treatment, however, increased at >$360^{\circ}C$ in the case of Ti/Au contact. From the results above, Ti/Pd/Au was stable gate metal than Ti/Au.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.5
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• pp.712-718
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• 1986

A shallow n+ layer of implanted phosphorus was used to lower the barrier height of PtSinSi schottky diodes. The reduction of barrier height of the forward turn-on voltages from 400mV to 180mV of the forward was followed by implantation of phosphorus at 35KeV with an ion dose of 8.0x10**12 atoms/cm\ulcornerand was activated at 925\ulcorner for 30min in dry O2. The test result showed that, as the ion-implanted dose increased, the forward turn-on voltage and reverse breakdown voltage were linearly decreased, but the saturation current and ideality factor(n) were linearly increased.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.18-18
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• 2009

최근 다양하게 연구되고 있는 무분극(nonpolar) 갈륨질화물(GaN) 소재는 자발분극(spontaneous polarization) 및 압전분극(piezoelectric polarization) 등이 발생하지 않아 높은 내부양자효율의 확보가 가능하며, 이러한 장점을 바탕으로 고효율 특성을 갖는 발광다이오드(light-emitting diode) 및 고속 전자소자 등으로의 적용을 위한 연구가 활발히 수행 중 이다. 하지만, 무분극 GaN LED의 구현 시, GaN 박막의 비등방성 성장으로 인한 박막의 막질 저하와 함께 표면에 혼재하는 Ga층과 N층에서 기인되는 절연층의 생성으로 인한 오믹전극 형성의 어려움이 대두되고 있다. 따라서, 고효율의 무분극 GaN LED 구현을 위해서는 무분극 GaN층의 질소층 제거를 위한 표면처리 공정과 더불어 금속/무분극 GaN층 간 발생되는 쇼트키 장벽층의 높이(Schottky barrier height)를 제어하는 연구가 선행되어야 한다. 본 논문에서는 무분극 GaN LED 적용을 위한 n-형 전극물질 및 오믹조건 구현을 위한 금속/무분극 GaN층간 SBH의 제어방법에 대한 연구를 수행하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.1
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• pp.229-234
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• 1999

We analyzed the reliability characteristics in platinum schottky diodes with variations of n-type silicon substrates concentrations and temperature variations of measurements. The parameters of reliability measurement analysis are saturation current. turn-on voltage and ideality factor in the forward bias, the breakdown voltage in the reverse bias with device shapes. The shape of devices are square type and long rectangular type for edge effect. As a result, we analyzed that the forward turn-on voltage, barrier height, dynamic resistance and reverse breakdown voltage were decreased but ideality factor and saturation current were increased by increased concentration in platinum and n-silicon junction parts. In measurement temperature(RT, $50^{\circ}C$, $75^{\circ}C$), the extracted electrical parameter values of reliability characteristics were increased at the higher temperature under the forward and reverse bias. The long rectangular type devices were more decreased than the square type in reverse breakdown voltage by tunneling effects of edge part.

• Journal of the Korean Magnetics Society
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• v.16 no.2
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• pp.130-135
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• 2006

We theoretically demonstrate that the interlayer exchange coupling (IEC) energy can be manipulated by means of an external bias voltage in a $F_1/NM/F_2/S$$(F_1:ferromagnetic,\;NM:nonmagnetic\;metallic,\;F_2:ferromagnetic,\;S:semiconductor\;layers)$ four-layer system. It is well known that the IEC energy between two ferromagnetic layers separated by nanometer thick nonmagnetic layer depends on the spin-dependence of reflectivity to the $F_1/NM/F_2/S$ four-layer system, where the reflectivities at the interface in $NM/F_2$ interface also depends on $F_2/S$ interface due to the multiple reflection of an electron-like optics. Finally, the IEC energy depends on the spin-dependent electron reflectivity not only at the interfaces of $F_1/NM/F_2$, but also at the interface of $F_2/S$. Naturally the Schottky barrier is formed at the interface between metallic ferromagnetic layer and semiconductor, the Schottky barrier height and thickness can be tailored by an external bias voltage, which causes the change of the spin-dependent reflectivity at $F_2/S$ interface. We show that the IEC energy between two ferromagnetic layers can be controlled by an external bias voltage due ti the electron-optics nature using a simple free-electron-like one-dimensional model.